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util_axis_fifo: Update (#1255) 

* util_axis_fifo: Update

- Added missing signal drivers for tlast and tkeep

Signed-off-by: Istvan-Zsolt Szekely <istvan.szekely@analog.com>
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IstvanZsSzekely 2024-01-26 13:31:21 +02:00 committed by GitHub
parent 231632e8ca
commit 57356cc4ee
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1 changed files with 13 additions and 8 deletions
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21
library/util_axis_fifo/util_axis_fifo.v
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@ -1,6 +1,6 @@
// *************************************************************************** // ***************************************************************************
// *************************************************************************** // ***************************************************************************
// Copyright (C) 2014-2023 Analog Devices, Inc. All rights reserved. // Copyright (C) 2014-2024 Analog Devices, Inc. All rights reserved.
// //
// In this HDL repository, there are many different and unique modules, consisting // In this HDL repository, there are many different and unique modules, consisting
// of various HDL (Verilog or VHDL) components. The individual modules are // of various HDL (Verilog or VHDL) components. The individual modules are
@ -148,8 +148,8 @@ module util_axis_fifo #(
axis_tlast_d <= s_axis_tlast; axis_tlast_d <= s_axis_tlast;
end end
assign m_axis_tlast = axis_tlast_d; assign m_axis_tlast = axis_tlast_d;
end else
end assign m_axis_tlast = 'b0;
// TKEEP support // TKEEP support
if (TKEEP_EN) begin if (TKEEP_EN) begin
@ -161,8 +161,8 @@ module util_axis_fifo #(
axis_tkeep_d <= s_axis_tkeep; axis_tkeep_d <= s_axis_tkeep;
end end
assign m_axis_tkeep = axis_tkeep_d; assign m_axis_tkeep = axis_tkeep_d;
end else
end assign m_axis_tkeep = {DATA_WIDTH/8{1'b1}};
end /* zerodeep */ end /* zerodeep */
else else
@ -205,7 +205,8 @@ module util_axis_fifo #(
end end
end end
assign m_axis_tlast = axis_tlast_d; assign m_axis_tlast = axis_tlast_d;
end end else
assign m_axis_tlast = 'b0;
// TKEEP support // TKEEP support
if (TKEEP_EN) begin if (TKEEP_EN) begin
@ -219,8 +220,8 @@ module util_axis_fifo #(
end end
end end
assign m_axis_tkeep = axis_tkeep_d; assign m_axis_tkeep = axis_tkeep_d;
end else
end assign m_axis_tkeep = {DATA_WIDTH/8{1'b1}};
end /* !ASYNC_CLK */ end /* !ASYNC_CLK */
@ -288,13 +289,17 @@ module util_axis_fifo #(
end else if (TKEEP_EN) begin end else if (TKEEP_EN) begin
assign s_axis_data_int_s = {s_axis_tkeep, s_axis_data}; assign s_axis_data_int_s = {s_axis_tkeep, s_axis_data};
assign m_axis_tkeep = m_axis_data_int_s[MEM_WORD-1-:DATA_WIDTH/8]; assign m_axis_tkeep = m_axis_data_int_s[MEM_WORD-1-:DATA_WIDTH/8];
assign m_axis_tlast = 'b0;
assign m_axis_data = m_axis_data_int_s[DATA_WIDTH-1:0]; assign m_axis_data = m_axis_data_int_s[DATA_WIDTH-1:0];
end else if (TLAST_EN) begin end else if (TLAST_EN) begin
assign s_axis_data_int_s = {s_axis_tlast, s_axis_data}; assign s_axis_data_int_s = {s_axis_tlast, s_axis_data};
assign m_axis_tkeep = {DATA_WIDTH/8{1'b1}};
assign m_axis_tlast = m_axis_data_int_s[DATA_WIDTH]; assign m_axis_tlast = m_axis_data_int_s[DATA_WIDTH];
assign m_axis_data = m_axis_data_int_s[DATA_WIDTH-1:0]; assign m_axis_data = m_axis_data_int_s[DATA_WIDTH-1:0];
end else begin end else begin
assign s_axis_data_int_s = {s_axis_data}; assign s_axis_data_int_s = {s_axis_data};
assign m_axis_tkeep = {DATA_WIDTH/8{1'b1}};
assign m_axis_tlast = 'b0;
assign m_axis_data = m_axis_data_int_s[DATA_WIDTH-1:0]; assign m_axis_data = m_axis_data_int_s[DATA_WIDTH-1:0];
end end