axi_dmac: Added patch to fix issue on altera systems
parent
5f21f54463
commit
58fa0776c9
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@ -84,6 +84,8 @@ reg [31-C_BYTES_PER_BEAT_WIDTH:0] address = 'h00;
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reg [C_BEATS_PER_BURST_WIDTH-1:0] last_burst_len = 'h00;
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reg [C_BEATS_PER_BURST_WIDTH-1:0] last_burst_len = 'h00;
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assign addr = {address, {C_BYTES_PER_BEAT_WIDTH{1'b0}}};
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assign addr = {address, {C_BYTES_PER_BEAT_WIDTH{1'b0}}};
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reg addr_valid_d1;
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// If we already asserted addr_valid we have to wait until it is accepted before
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// If we already asserted addr_valid we have to wait until it is accepted before
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// we can disable the address generator.
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// we can disable the address generator.
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always @(posedge clk) begin
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always @(posedge clk) begin
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@ -134,10 +136,13 @@ end
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always @(posedge clk) begin
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always @(posedge clk) begin
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if (resetn == 1'b0) begin
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if (resetn == 1'b0) begin
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id <='h0;
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id <='h0;
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addr_valid_d1 <= 1'b0;
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end else begin
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end else begin
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if ((addr_valid && addr_ready) ||
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addr_valid_d1 <= addr_valid;
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if (( addr_valid && ~addr_valid_d1) ||
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(sync_id && id != request_id))
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(sync_id && id != request_id))
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id <= inc_id(id);
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id <= inc_id(id);
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end
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end
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end
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end
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