dmac: clock-typo
parent
e05ff26406
commit
5c6340e927
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@ -313,7 +313,7 @@ proc axi_dmac_elaborate {} {
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}
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if {[get_parameter_value C_DMA_TYPE_SRC] == 2} {
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ad_alt_intf clock fifo_wr_clock input 1 adc_clk
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ad_alt_intf clock fifo_wr_clk input 1 adc_clk
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ad_alt_intf signal fifo_wr_en input 1 adc_valid
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ad_alt_intf signal fifo_wr_din input C_DMA_DATA_WIDTH_SRC adc_data
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ad_alt_intf signal fifo_wr_overflow output 1 adc_dovf
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