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ad9082_fmca_ebz: Update parameter description

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Laszlo Nagy 2022-03-03 07:43:01 +00:00 committed by Laszlo Nagy
parent 081de06ec9
commit 5ced589258
1 changed files with 2 additions and 0 deletions
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projects/ad9082_fmca_ebz/vcu118/system_project.tcl
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@ -23,8 +23,10 @@ source $ad_hdl_dir/projects/scripts/adi_board.tcl
# TX_RATE : Line rate of the Tx link ( FPGA to MxFE )
# [RX/TX]_JESD_M : Number of converters per link
# [RX/TX]_JESD_L : Number of lanes per link
# [RX/TX]_JESD_S : Number of samples per frame
# [RX/TX]_JESD_NP : Number of bits per sample, only 16 is supported
# [RX/TX]_NUM_LINKS : Number of links, matches numer of MxFE devices
# [RX/TX]_KS_PER_CHANNEL : Number of samples stored in internal buffers in kilosamples per converter (M)
#
adi_project ad9082_fmca_ebz_vcu118 0 [list \