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cpack- ad_rst port addition

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Rejeesh Kutty 2015-08-18 12:44:57 -04:00
parent f8b3346e97
commit 5e252f17b9
1 changed files with 1 additions and 4 deletions
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5
library/util_cpack/util_cpack_hw.tcl
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@ -39,6 +39,7 @@ set_parameter_property NUM_OF_CHANNELS HDL_PARAMETER true
# defaults
ad_alt_intf clock adc_clk input 1
ad_alt_intf reset adc_rst input 1 if_adc_clk
ad_alt_intf signal adc_valid output 1
ad_alt_intf signal adc_sync output 1
ad_alt_intf signal adc_data output NUM_OF_CHANNELS*CHANNEL_DATA_WIDTH
@ -46,10 +47,6 @@ ad_alt_intf signal adc_valid_0 input 1
ad_alt_intf signal adc_enable_0 input 1
ad_alt_intf signal adc_data_0 input CHANNEL_DATA_WIDTH
add_interface adc_reset reset end
set_interface_property adc_reset associatedClock if_adc_clk
add_interface_port adc_reset adc_rst reset Input 1
proc p_util_cpack {} {
if {[get_parameter_value NUM_OF_CHANNELS] > 1} {