ad9144- qsys needs interface signal name matching

2015-07-15 15:58:10 -04:00 · 2015-07-15 15:58:10 -04:00 · 60c344cea6
parent 6c0ad6ede8
commit 60c344cea6
1 changed files with 1 additions and 1 deletions
--- a/library/axi_ad9144/axi_ad9144_hw.tcl
+++ b/library/axi_ad9144/axi_ad9144_hw.tcl
@ -84,7 +84,7 @@ add_interface_port s_axi s_axi_rready rready Input 1
 # transceiver interface

 ad_alt_intf clock   tx_clk        input   1
-ad_alt_intf signal  tx_data       output  128*(PCORE_QUAD_DUAL_N+1)
+ad_alt_intf signal  tx_data       output  128*(PCORE_QUAD_DUAL_N+1) data

 # dma interface