From 60d2fb939d51127fd343f0a8d333f014ecf41b5c Mon Sep 17 00:00:00 2001 From: Istvan Csomortani Date: Thu, 14 Dec 2017 10:59:46 +0000 Subject: [PATCH] avl_dacfifo: Control the avl_burstcount inside the FSM --- library/altera/avl_dacfifo/avl_dacfifo_rd.v | 17 ++++------------- 1 file changed, 4 insertions(+), 13 deletions(-) diff --git a/library/altera/avl_dacfifo/avl_dacfifo_rd.v b/library/altera/avl_dacfifo/avl_dacfifo_rd.v index cb50f7e04..5e6e2c3dc 100644 --- a/library/altera/avl_dacfifo/avl_dacfifo_rd.v +++ b/library/altera/avl_dacfifo/avl_dacfifo_rd.v @@ -194,6 +194,7 @@ module avl_dacfifo_rd #( always @(posedge avl_clk) begin if (avl_fifo_reset_s == 1'b1) begin avl_read_state <= IDLE; + avl_burstcount <= AVL_BURST_LENGTH; end else begin case (avl_read_state) IDLE : begin @@ -208,8 +209,10 @@ module avl_dacfifo_rd #( if (avl_mem_request_data == 1'b1) begin if (avl_address + AVL_ARINCR <= avl_last_address) begin avl_read_state <= XFER_FULL_BURST; + avl_burstcount <= AVL_BURST_LENGTH; end else begin avl_read_state <= XFER_PARTIAL_BURST; + avl_burstcount <= avl_last_burstcount; end end end else begin @@ -280,7 +283,7 @@ module avl_dacfifo_rd #( end end - // Avalon burstcount + // Avalon burstcounter always @(posedge avl_clk) begin if (avl_fifo_reset_s == 1'b1) begin @@ -294,18 +297,6 @@ module avl_dacfifo_rd #( end end - always @(posedge avl_clk) begin - if (avl_fifo_reset_s) begin - avl_burstcount <= 'b0; - end else begin - if (avl_read_state == XFER_PARTIAL_BURST) begin - avl_burstcount <= avl_last_burstcount; - end else begin - avl_burstcount <= AVL_BURST_LENGTH; - end - end - end - assign avl_byteenable = {64{1'b1}}; // write data from Avalon interface into the async FIFO