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ad9361: ip defaults & rst output

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Rejeesh Kutty 2015-06-05 09:19:39 -04:00
parent cb0324c2b1
commit 6338dfd8b7
2 changed files with 9 additions and 4 deletions
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3
library/axi_ad9361/axi_ad9361.v
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@ -72,6 +72,7 @@ module axi_ad9361 (
l_clk, l_clk,
clk, clk,
rst,
// dma interface // dma interface
@ -185,6 +186,7 @@ module axi_ad9361 (
output l_clk; output l_clk;
input clk; input clk;
output rst;
// dma interface // dma interface
@ -266,7 +268,6 @@ module axi_ad9361 (
// internal clocks and resets // internal clocks and resets
wire rst;
wire up_clk; wire up_clk;
wire up_rstn; wire up_rstn;
wire delay_rst; wire delay_rst;

10
library/axi_ad9361/axi_ad9361_ip.tcl
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@ -41,14 +41,18 @@ adi_ip_files axi_ad9361 [list \
"axi_ad9361.v" ] "axi_ad9361.v" ]
adi_ip_properties axi_ad9361 adi_ip_properties axi_ad9361
adi_ip_constraints axi_dmac "axi_ad9361_constr.xdc" "late" adi_ip_constraints axi_ad9361 "axi_ad9361_constr.xdc" "late"
set_property physical_name {s_axi_aclk} [ipx::get_port_map CLK \ set_property physical_name {s_axi_aclk} [ipx::get_port_maps CLK \
[ipx::get_bus_interface s_axi_signal_clock [ipx::current_core]]] -of_objects [ipx::get_bus_interfaces s_axi_signal_clock -of_objects [ipx::current_core]]]
ipx::remove_bus_interface {signal_clock} [ipx::current_core] ipx::remove_bus_interface {signal_clock} [ipx::current_core]
set_property driver_value 0 [ipx::get_ports *dac_sync_in* -of_objects [ipx::current_core]]
set_property driver_value 0 [ipx::get_ports *dovf* -of_objects [ipx::current_core]]
set_property driver_value 0 [ipx::get_ports *dunf* -of_objects [ipx::current_core]]
set_property driver_value 0 [ipx::get_ports *gpio_in* -of_objects [ipx::current_core]]
ipx::save_core [ipx::current_core] ipx::save_core [ipx::current_core]