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ad77681evb: Initial commit

main
Istvan Csomortani 2017-04-28 18:02:59 +03:00
parent 3ba57582bb
commit 6387b53266
9 changed files with 750 additions and 122 deletions
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244
library/Makefile
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@ -10,84 +10,84 @@ all: lib
clean:
make -C axi_ad5766 clean
make -C axi_ad6676 clean
make -C axi_ad7616 clean
make -C axi_ad9122 clean
make -C axi_ad9144 clean
make -C axi_ad9152 clean
make -C axi_ad9162 clean
make -C axi_ad9234 clean
make -C axi_ad9250 clean
make -C axi_ad9265 clean
make -C axi_ad9361 clean
make -C axi_ad9371 clean
make -C axi_ad9434 clean
make -C axi_ad9467 clean
make -C axi_ad9625 clean
make -C axi_ad9643 clean
make -C axi_ad9652 clean
make -C axi_ad9671 clean
make -C axi_ad9680 clean
make -C axi_ad9684 clean
make -C axi_ad9739a clean
make -C axi_ad9963 clean
make -C cordic_demod clean
make -C axi_ad9467 clean
make -C axi_adc_decimate clean
make -C axi_adc_trigger clean
make -C axi_clkgen clean
make -C axi_dac_interpolate clean
make -C axi_dmac clean
make -C axi_fmcadc5_sync clean
make -C axi_generic_adc clean
make -C axi_ad9144 clean
make -C axi_i2s_adi clean
make -C util_wfifo clean
make -C cn0363/cn0363_phase_data_sync clean
make -C cn0363/cn0363_dma_sequencer clean
make -C axi_ad9625 clean
make -C axi_mc_controller clean
make -C axi_ad9234 clean
make -C util_cpack clean
make -C axi_gpreg clean
make -C axi_hdmi_rx clean
make -C axi_hdmi_tx clean
make -C axi_ad9152 clean
make -C util_upack clean
make -C axi_ad6676 clean
make -C util_gmii_to_rgmii clean
make -C axi_ad9643 clean
make -C axi_ad5766 clean
make -C util_var_fifo clean
make -C axi_ad9434 clean
make -C util_fir_int clean
make -C axi_ad7616 clean
make -C util_i2c_mixer clean
make -C axi_ad9371 clean
make -C util_pmod_adc clean
make -C util_pmod_fmeter clean
make -C axi_spdif_rx clean
make -C axi_i2s_adi clean
make -C axi_intr_monitor clean
make -C axi_logic_analyzer clean
make -C axi_mc_controller clean
make -C axi_mc_current_monitor clean
make -C axi_mc_speed clean
make -C axi_rd_wr_combiner clean
make -C axi_spdif_rx clean
make -C axi_spdif_tx clean
make -C axi_usb_fx3 clean
make -C cn0363/cn0363_dma_sequencer clean
make -C cn0363/cn0363_phase_data_sync clean
make -C cordic_demod clean
make -C spi_engine/axi_spi_engine clean
make -C spi_engine/spi_engine_execution clean
make -C spi_engine/spi_engine_interconnect clean
make -C spi_engine/spi_engine_offload clean
make -C util_adcfifo clean
make -C util_axis_fifo clean
make -C util_axis_resize clean
make -C util_bsplit clean
make -C util_ccat clean
make -C util_cic clean
make -C util_clkdiv clean
make -C util_cpack clean
make -C util_dacfifo clean
make -C util_extract clean
make -C util_fir_dec clean
make -C util_fir_int clean
make -C util_gmii_to_rgmii clean
make -C util_i2c_mixer clean
make -C util_mfifo clean
make -C util_cic clean
make -C axi_gpreg clean
make -C axi_usb_fx3 clean
make -C axi_dac_interpolate clean
make -C util_axis_fifo clean
make -C axi_ad9652 clean
make -C util_pmod_adc clean
make -C util_pmod_fmeter clean
make -C util_pulse_gen clean
make -C axi_adc_trigger clean
make -C axi_fmcadc5_sync clean
make -C util_bsplit clean
make -C util_clkdiv clean
make -C axi_rd_wr_combiner clean
make -C axi_ad9265 clean
make -C axi_spdif_tx clean
make -C axi_ad9680 clean
make -C util_tdd_sync clean
make -C axi_logic_analyzer clean
make -C axi_intr_monitor clean
make -C util_dacfifo clean
make -C axi_ad9250 clean
make -C axi_ad9162 clean
make -C axi_ad9361 clean
make -C util_ccat clean
make -C util_rfifo clean
make -C util_sigma_delta_spi clean
make -C axi_dmac clean
make -C axi_clkgen clean
make -C axi_hdmi_rx clean
make -C xilinx/axi_dacfifo clean
make -C util_tdd_sync clean
make -C util_upack clean
make -C util_var_fifo clean
make -C util_wfifo clean
make -C xilinx/axi_adcfifo clean
make -C xilinx/axi_adxcvr clean
make -C xilinx/axi_dacfifo clean
make -C xilinx/axi_xcvrlb clean
make -C xilinx/util_adxcvr clean
make -C axi_mc_speed clean
make -C util_adcfifo clean
make -C util_axis_resize clean
make -C spi_engine/spi_engine_execution clean
make -C spi_engine/spi_engine_offload clean
make -C spi_engine/axi_spi_engine clean
make -C spi_engine/spi_engine_interconnect clean
make -C axi_ad9684 clean
make -C axi_adc_decimate clean
make -C interfaces clean
@ -96,84 +96,84 @@ clean-all:clean
lib:
make -C axi_ad5766
make -C axi_ad6676
make -C axi_ad7616
make -C axi_ad9122
make -C axi_ad9144
make -C axi_ad9152
make -C axi_ad9162
make -C axi_ad9234
make -C axi_ad9250
make -C axi_ad9265
make -C axi_ad9361
make -C axi_ad9371
make -C axi_ad9434
make -C axi_ad9467
make -C axi_ad9625
make -C axi_ad9643
make -C axi_ad9652
make -C axi_ad9671
make -C axi_ad9680
make -C axi_ad9684
make -C axi_ad9739a
make -C axi_ad9963
make -C cordic_demod
make -C axi_ad9467
make -C axi_adc_decimate
make -C axi_adc_trigger
make -C axi_clkgen
make -C axi_dac_interpolate
make -C axi_dmac
make -C axi_fmcadc5_sync
make -C axi_generic_adc
make -C axi_ad9144
make -C axi_i2s_adi
make -C util_wfifo
make -C cn0363/cn0363_phase_data_sync
make -C cn0363/cn0363_dma_sequencer
make -C axi_ad9625
make -C axi_mc_controller
make -C axi_ad9234
make -C util_cpack
make -C axi_gpreg
make -C axi_hdmi_rx
make -C axi_hdmi_tx
make -C axi_ad9152
make -C util_upack
make -C axi_ad6676
make -C util_gmii_to_rgmii
make -C axi_ad9643
make -C axi_ad5766
make -C util_var_fifo
make -C axi_ad9434
make -C util_fir_int
make -C axi_ad7616
make -C util_i2c_mixer
make -C axi_ad9371
make -C util_pmod_adc
make -C util_pmod_fmeter
make -C axi_spdif_rx
make -C axi_i2s_adi
make -C axi_intr_monitor
make -C axi_logic_analyzer
make -C axi_mc_controller
make -C axi_mc_current_monitor
make -C axi_mc_speed
make -C axi_rd_wr_combiner
make -C axi_spdif_rx
make -C axi_spdif_tx
make -C axi_usb_fx3
make -C cn0363/cn0363_dma_sequencer
make -C cn0363/cn0363_phase_data_sync
make -C cordic_demod
make -C spi_engine/axi_spi_engine
make -C spi_engine/spi_engine_execution
make -C spi_engine/spi_engine_interconnect
make -C spi_engine/spi_engine_offload
make -C util_adcfifo
make -C util_axis_fifo
make -C util_axis_resize
make -C util_bsplit
make -C util_ccat
make -C util_cic
make -C util_clkdiv
make -C util_cpack
make -C util_dacfifo
make -C util_extract
make -C util_fir_dec
make -C util_fir_int
make -C util_gmii_to_rgmii
make -C util_i2c_mixer
make -C util_mfifo
make -C util_cic
make -C axi_gpreg
make -C axi_usb_fx3
make -C axi_dac_interpolate
make -C util_axis_fifo
make -C axi_ad9652
make -C util_pmod_adc
make -C util_pmod_fmeter
make -C util_pulse_gen
make -C axi_adc_trigger
make -C axi_fmcadc5_sync
make -C util_bsplit
make -C util_clkdiv
make -C axi_rd_wr_combiner
make -C axi_ad9265
make -C axi_spdif_tx
make -C axi_ad9680
make -C util_tdd_sync
make -C axi_logic_analyzer
make -C axi_intr_monitor
make -C util_dacfifo
make -C axi_ad9250
make -C axi_ad9162
make -C axi_ad9361
make -C util_ccat
make -C util_rfifo
make -C util_sigma_delta_spi
make -C axi_dmac
make -C axi_clkgen
make -C axi_hdmi_rx
make -C xilinx/axi_dacfifo
make -C util_tdd_sync
make -C util_upack
make -C util_var_fifo
make -C util_wfifo
make -C xilinx/axi_adcfifo
make -C xilinx/axi_adxcvr
make -C xilinx/axi_dacfifo
make -C xilinx/axi_xcvrlb
make -C xilinx/util_adxcvr
make -C axi_mc_speed
make -C util_adcfifo
make -C util_axis_resize
make -C spi_engine/spi_engine_execution
make -C spi_engine/spi_engine_offload
make -C spi_engine/axi_spi_engine
make -C spi_engine/spi_engine_interconnect
make -C axi_ad9684
make -C axi_adc_decimate
make -C interfaces

3
projects/Makefile
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@ -10,6 +10,7 @@ all:
-make -C ad5766_sdz all
-make -C ad6676evb all
-make -C ad7616_sdz all
-make -C ad77681evb all
-make -C ad7768evb all
-make -C ad9265_fmc all
-make -C ad9434_fmc all
@ -49,6 +50,7 @@ clean:
make -C ad5766_sdz clean
make -C ad6676evb clean
make -C ad7616_sdz clean
make -C ad77681evb clean
make -C ad7768evb clean
make -C ad9265_fmc clean
make -C ad9434_fmc clean
@ -88,6 +90,7 @@ clean-all:
make -C ad5766_sdz clean-all
make -C ad6676evb clean-all
make -C ad7616_sdz clean-all
make -C ad77681evb clean-all
make -C ad7768evb clean-all
make -C ad9265_fmc clean-all
make -C ad9434_fmc clean-all

21
projects/ad77681evb/Makefile Normal file
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@ -0,0 +1,21 @@
####################################################################################
####################################################################################
## Copyright 2011(c) Analog Devices, Inc.
## Auto-generated, do not modify!
####################################################################################
####################################################################################
.PHONY: all clean clean-all
all:
-make -C zed all
clean:
make -C zed clean
clean-all:
make -C zed clean-all
####################################################################################
####################################################################################

191
projects/ad77681evb/common/ad77681evb_bd.tcl Normal file
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@ -0,0 +1,191 @@
create_bd_intf_port -mode Master -vlnv analog.com:interface:spi_master_rtl:1.0 adc1_spi
create_bd_intf_port -mode Master -vlnv analog.com:interface:spi_master_rtl:1.0 adc2_spi
create_bd_port -dir I adc1_data_ready
create_bd_port -dir I adc2_data_ready
# create a SPI Engine architecture for both ADCs
create_bd_cell -type hier spi_adc1
current_bd_instance /spi_adc1
create_bd_pin -dir I -type clk clk
create_bd_pin -dir I -type rst resetn
create_bd_pin -dir I drdy
create_bd_pin -dir O irq
create_bd_intf_pin -mode Master -vlnv analog.com:interface:spi_master_rtl:1.0 m_spi
create_bd_intf_pin -mode Master -vlnv xilinx.com:interface:axis_rtl:1.0 M_AXIS_SAMPLE
ad_ip_instance spi_engine_execution execution
ad_ip_parameter execution CONFIG.DATA_WIDTH 8
ad_ip_parameter execution CONFIG.NUM_OF_CS 1
ad_ip_instance axi_spi_engine axi_1
ad_ip_parameter axi_1 CONFIG.DATA_WIDTH 8
ad_ip_parameter axi_1 CONFIG.NUM_OFFLOAD 1
ad_ip_instance spi_engine_offload offload
ad_ip_parameter offload CONFIG.DATA_WIDTH 8
ad_ip_parameter offload CONFIG.ASYNC_TRIG 1
ad_ip_instance spi_engine_interconnect interconnect
ad_ip_parameter interconnect CONFIG.DATA_WIDTH 8
ad_ip_instance axis_dwidth_converter m_axis_samples_24
ad_ip_parameter m_axis_samples_24 CONFIG.M_TDATA_NUM_BYTES 3
ad_connect axi_1/spi_engine_offload_ctrl0 offload/spi_engine_offload_ctrl
ad_connect offload/spi_engine_ctrl interconnect/s0_ctrl
ad_connect axi_1/spi_engine_ctrl interconnect/s1_ctrl
ad_connect interconnect/m_ctrl execution/ctrl
ad_connect offload/offload_sdi m_axis_samples_24/S_AXIS
ad_connect m_axis_samples_24/M_AXIS M_AXIS_SAMPLE
ad_connect execution/spi m_spi
ad_connect clk offload/spi_clk
ad_connect clk offload/ctrl_clk
ad_connect clk execution/clk
ad_connect clk axi_1/s_axi_aclk
ad_connect clk axi_1/spi_clk
ad_connect clk interconnect/clk
ad_connect clk m_axis_samples_24/aclk
ad_connect axi_1/spi_resetn offload/spi_resetn
ad_connect axi_1/spi_resetn execution/resetn
ad_connect axi_1/spi_resetn interconnect/resetn
ad_connect axi_1/spi_resetn m_axis_samples_24/aresetn
ad_connect drdy offload/trigger
ad_connect resetn axi_1/s_axi_aresetn
ad_connect irq axi_1/irq
current_bd_instance /
create_bd_cell -type hier spi_adc2
current_bd_instance /spi_adc2
create_bd_pin -dir I -type clk clk
create_bd_pin -dir I -type rst resetn
create_bd_pin -dir I drdy
create_bd_pin -dir O irq
create_bd_intf_pin -mode Master -vlnv analog.com:interface:spi_master_rtl:1.0 m_spi
create_bd_intf_pin -mode Master -vlnv xilinx.com:interface:axis_rtl:1.0 M_AXIS_SAMPLE
ad_ip_instance spi_engine_execution execution
ad_ip_parameter execution CONFIG.DATA_WIDTH 8
ad_ip_parameter execution CONFIG.NUM_OF_CS 1
ad_ip_instance axi_spi_engine axi_2
ad_ip_parameter axi_2 CONFIG.DATA_WIDTH 8
ad_ip_parameter axi_2 CONFIG.NUM_OFFLOAD 1
ad_ip_instance spi_engine_offload offload
ad_ip_parameter offload CONFIG.DATA_WIDTH 8
ad_ip_parameter offload CONFIG.ASYNC_TRIG 1
ad_ip_instance spi_engine_interconnect interconnect
ad_ip_parameter interconnect CONFIG.DATA_WIDTH 8
ad_ip_instance axis_dwidth_converter m_axis_samples_24
ad_ip_parameter m_axis_samples_24 CONFIG.M_TDATA_NUM_BYTES 3
ad_connect axi_2/spi_engine_offload_ctrl0 offload/spi_engine_offload_ctrl
ad_connect offload/spi_engine_ctrl interconnect/s0_ctrl
ad_connect axi_2/spi_engine_ctrl interconnect/s1_ctrl
ad_connect interconnect/m_ctrl execution/ctrl
ad_connect offload/offload_sdi m_axis_samples_24/S_AXIS
ad_connect m_axis_samples_24/M_AXIS M_AXIS_SAMPLE
ad_connect execution/spi m_spi
ad_connect clk offload/spi_clk
ad_connect clk offload/ctrl_clk
ad_connect clk execution/clk
ad_connect clk axi_2/s_axi_aclk
ad_connect clk axi_2/spi_clk
ad_connect clk interconnect/clk
ad_connect clk m_axis_samples_24/aclk
ad_connect axi_2/spi_resetn offload/spi_resetn
ad_connect axi_2/spi_resetn execution/resetn
ad_connect axi_2/spi_resetn interconnect/resetn
ad_connect axi_2/spi_resetn m_axis_samples_24/aresetn
ad_connect drdy offload/trigger
ad_connect resetn axi_2/s_axi_aresetn
ad_connect irq axi_2/irq
current_bd_instance /
ad_connect adc1_data_ready spi_adc1/drdy
ad_connect adc2_data_ready spi_adc2/drdy
# dma for the ADC1
ad_ip_instance axi_dmac axi_ad77681_dma_1
ad_ip_parameter axi_ad77681_dma_1 CONFIG.DMA_TYPE_SRC 1
ad_ip_parameter axi_ad77681_dma_1 CONFIG.DMA_TYPE_DEST 0
ad_ip_parameter axi_ad77681_dma_1 CONFIG.CYCLIC 0
ad_ip_parameter axi_ad77681_dma_1 CONFIG.SYNC_TRANSFER_START 0
ad_ip_parameter axi_ad77681_dma_1 CONFIG.AXI_SLICE_SRC 0
ad_ip_parameter axi_ad77681_dma_1 CONFIG.AXI_SLICE_DEST 1
ad_ip_parameter axi_ad77681_dma_1 CONFIG.DMA_2D_TRANSFER 0
ad_ip_parameter axi_ad77681_dma_1 CONFIG.DMA_DATA_WIDTH_SRC 32
ad_ip_parameter axi_ad77681_dma_1 CONFIG.DMA_DATA_WIDTH_DEST 64
ad_connect sys_cpu_clk spi_adc1/clk
ad_connect sys_cpu_resetn spi_adc1/resetn
ad_connect sys_cpu_resetn axi_ad77681_dma_1/m_dest_axi_aresetn
ad_connect spi_adc1/m_spi adc1_spi
ad_connect axi_ad77681_dma_1/s_axis spi_adc1/M_AXIS_SAMPLE
# dma for the ADC2
ad_ip_instance axi_dmac axi_ad77681_dma_2
ad_ip_parameter axi_ad77681_dma_2 CONFIG.DMA_TYPE_SRC 1
ad_ip_parameter axi_ad77681_dma_2 CONFIG.DMA_TYPE_DEST 0
ad_ip_parameter axi_ad77681_dma_2 CONFIG.CYCLIC 0
ad_ip_parameter axi_ad77681_dma_2 CONFIG.SYNC_TRANSFER_START 0
ad_ip_parameter axi_ad77681_dma_2 CONFIG.AXI_SLICE_SRC 0
ad_ip_parameter axi_ad77681_dma_2 CONFIG.AXI_SLICE_DEST 1
ad_ip_parameter axi_ad77681_dma_2 CONFIG.DMA_2D_TRANSFER 0
ad_ip_parameter axi_ad77681_dma_2 CONFIG.DMA_DATA_WIDTH_SRC 32
ad_ip_parameter axi_ad77681_dma_2 CONFIG.DMA_DATA_WIDTH_DEST 64
ad_connect sys_cpu_clk spi_adc2/clk
ad_connect sys_cpu_resetn spi_adc2/resetn
ad_connect sys_cpu_resetn axi_ad77681_dma_2/m_dest_axi_aresetn
ad_connect spi_adc2/m_spi adc2_spi
ad_connect axi_ad77681_dma_2/s_axis spi_adc2/M_AXIS_SAMPLE
# AXI address definitions
ad_cpu_interconnect 0x44a00000 spi_adc1/axi_1
ad_cpu_interconnect 0x44b00000 spi_adc2/axi_2
ad_cpu_interconnect 0x44a30000 axi_ad77681_dma_1
ad_cpu_interconnect 0x44b30000 axi_ad77681_dma_2
ad_connect sys_cpu_clk axi_ad77681_dma_1/s_axis_aclk
ad_connect sys_cpu_clk axi_ad77681_dma_2/s_axis_aclk
# interrupts
ad_cpu_interrupt "ps-13" "mb-13" axi_ad77681_dma_1/irq
ad_cpu_interrupt "ps-12" "mb-12" axi_ad77681_dma_2/irq
ad_cpu_interrupt "ps-11" "mb-11" spi_adc1/irq
ad_cpu_interrupt "ps-10" "mb-10" spi_adc2/irq
# memory interconnects
ad_mem_hp2_interconnect sys_cpu_clk sys_ps7/S_AXI_HP2
ad_mem_hp2_interconnect sys_cpu_clk axi_ad77681_dma_1/m_dest_axi
ad_mem_hp3_interconnect sys_cpu_clk sys_ps7/S_AXI_HP3
ad_mem_hp3_interconnect sys_cpu_clk axi_ad77681_dma_2/m_dest_axi

88
projects/ad77681evb/zed/Makefile Normal file
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@ -0,0 +1,88 @@
####################################################################################
####################################################################################
## Copyright 2011(c) Analog Devices, Inc.
## Auto-generated, do not modify!
####################################################################################
####################################################################################
M_DEPS += system_top.v
M_DEPS += system_project.tcl
M_DEPS += system_constr.xdc
M_DEPS += system_bd.tcl
M_DEPS += ../common/ad77681evb_bd.tcl
M_DEPS += ../../scripts/adi_project.tcl
M_DEPS += ../../scripts/adi_env.tcl
M_DEPS += ../../scripts/adi_board.tcl
M_DEPS += ../../common/zed/zed_system_constr.xdc
M_DEPS += ../../common/zed/zed_system_bd.tcl
M_DEPS += ../../../library/xilinx/common/ad_iobuf.v
M_DEPS += ../../../library/xilinx/common/ad_cmos_clk.v
M_DEPS += ../../../library/axi_clkgen/axi_clkgen.xpr
M_DEPS += ../../../library/axi_dmac/axi_dmac.xpr
M_DEPS += ../../../library/axi_hdmi_tx/axi_hdmi_tx.xpr
M_DEPS += ../../../library/axi_i2s_adi/axi_i2s_adi.xpr
M_DEPS += ../../../library/axi_spdif_tx/axi_spdif_tx.xpr
M_DEPS += ../../../library/spi_engine/axi_spi_engine/axi_spi_engine.xpr
M_DEPS += ../../../library/spi_engine/spi_engine_execution/spi_engine_execution.xpr
M_DEPS += ../../../library/spi_engine/spi_engine_interconnect/spi_engine_interconnect.xpr
M_DEPS += ../../../library/spi_engine/spi_engine_offload/spi_engine_offload.xpr
M_DEPS += ../../../library/util_i2c_mixer/util_i2c_mixer.xpr
M_VIVADO := vivado -mode batch -source
M_FLIST := *.cache
M_FLIST += *.data
M_FLIST += *.xpr
M_FLIST += *.log
M_FLIST += *.jou
M_FLIST += xgui
M_FLIST += *.runs
M_FLIST += *.srcs
M_FLIST += *.sdk
M_FLIST += *.hw
M_FLIST += *.sim
M_FLIST += .Xil
M_FLIST += *.ip_user_files
.PHONY: all lib clean clean-all
all: lib ad77681evb_zed.sdk/system_top.hdf
clean:
rm -rf $(M_FLIST)
clean-all:clean
make -C ../../../library/axi_clkgen clean
make -C ../../../library/axi_dmac clean
make -C ../../../library/axi_hdmi_tx clean
make -C ../../../library/axi_i2s_adi clean
make -C ../../../library/axi_spdif_tx clean
make -C ../../../library/spi_engine/axi_spi_engine clean
make -C ../../../library/spi_engine/spi_engine_execution clean
make -C ../../../library/spi_engine/spi_engine_interconnect clean
make -C ../../../library/spi_engine/spi_engine_offload clean
make -C ../../../library/util_i2c_mixer clean
ad77681evb_zed.sdk/system_top.hdf: $(M_DEPS)
-rm -rf $(M_FLIST)
$(M_VIVADO) system_project.tcl >> ad77681evb_zed_vivado.log 2>&1
lib:
make -C ../../../library/axi_clkgen
make -C ../../../library/axi_dmac
make -C ../../../library/axi_hdmi_tx
make -C ../../../library/axi_i2s_adi
make -C ../../../library/axi_spdif_tx
make -C ../../../library/spi_engine/axi_spi_engine
make -C ../../../library/spi_engine/spi_engine_execution
make -C ../../../library/spi_engine/spi_engine_interconnect
make -C ../../../library/spi_engine/spi_engine_offload
make -C ../../../library/util_i2c_mixer
####################################################################################
####################################################################################

4
projects/ad77681evb/zed/system_bd.tcl Normal file
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source $ad_hdl_dir/projects/common/zed/zed_system_bd.tcl
source ../common/ad77681evb_bd.tcl

41
projects/ad77681evb/zed/system_constr.xdc Normal file
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# SPI interface
set_property -dict {PACKAGE_PIN N19 IOSTANDARD LVCMOS25 IOB TRUE} [get_ports ad7768_0_spi_sclk] ; ## FMC_LPC_LA01_CC_P
set_property -dict {PACKAGE_PIN P17 IOSTANDARD LVCMOS25 IOB TRUE PULLTYPE PULLUP} [get_ports ad7768_0_spi_miso] ; ## FMC_LPC_LA02_P
set_property -dict {PACKAGE_PIN N22 IOSTANDARD LVCMOS25} [get_ports ad7768_0_spi_mosi] ; ## FMC_LPC_LA03_P
set_property -dict {PACKAGE_PIN M21 IOSTANDARD LVCMOS25} [get_ports ad7768_0_spi_cs] ; ## FMC_LPC_LA04_P
set_property -dict {PACKAGE_PIN N20 IOSTANDARD LVCMOS25 IOB TRUE} [get_ports ad7768_1_spi_sclk] ; ## FMC_LPC_LA01_CC_N
set_property -dict {PACKAGE_PIN P18 IOSTANDARD LVCMOS25 IOB TRUE PULLTYPE PULLUP} [get_ports ad7768_1_spi_miso] ; ## FMC_LPC_LA02_N
set_property -dict {PACKAGE_PIN P22 IOSTANDARD LVCMOS25} [get_ports ad7768_1_spi_mosi] ; ## FMC_LPC_LA03_N
set_property -dict {PACKAGE_PIN M22 IOSTANDARD LVCMOS25} [get_ports ad7768_1_spi_cs] ; ## FMC_LPC_LA04_N
# reset and GPIO signals
set_property -dict {PACKAGE_PIN P20 IOSTANDARD LVCMOS25} [get_ports ad7768_0_reset] ; ## FMC_LPC_LA12_P
set_property -dict {PACKAGE_PIN J21 IOSTANDARD LVCMOS25} [get_ports ad7768_0_gpio[0]] ; ## FMC_LPC_LA08_P
set_property -dict {PACKAGE_PIN R20 IOSTANDARD LVCMOS25} [get_ports ad7768_0_gpio[1]] ; ## FMC_LPC_LA09_P
set_property -dict {PACKAGE_PIN R19 IOSTANDARD LVCMOS25} [get_ports ad7768_0_gpio[2]] ; ## FMC_LPC_LA10_P
set_property -dict {PACKAGE_PIN N17 IOSTANDARD LVCMOS25} [get_ports ad7768_0_gpio[3]] ; ## FMC_LPC_LA11_P
set_property -dict {PACKAGE_PIN P21 IOSTANDARD LVCMOS25} [get_ports ad7768_1_reset] ; ## FMC_LPC_LA12_N
set_property -dict {PACKAGE_PIN J22 IOSTANDARD LVCMOS25} [get_ports ad7768_1_gpio[0]] ; ## FMC_LPC_LA08_N
set_property -dict {PACKAGE_PIN R21 IOSTANDARD LVCMOS25} [get_ports ad7768_1_gpio[1]] ; ## FMC_LPC_LA09_N
set_property -dict {PACKAGE_PIN T19 IOSTANDARD LVCMOS25} [get_ports ad7768_1_gpio[2]] ; ## FMC_LPC_LA10_N
set_property -dict {PACKAGE_PIN N18 IOSTANDARD LVCMOS25} [get_ports ad7768_1_gpio[3]] ; ## FMC_LPC_LA11_N
# syncronization and timing
set_property -dict {PACKAGE_PIN J18 IOSTANDARD LVCMOS25 IOB TRUE} [get_ports ad7768_0_drdy] ; ## FMC_LPC_LA05_P
set_property -dict {PACKAGE_PIN L19 IOSTANDARD LVCMOS25} [get_ports ad7768_0_sync_out] ; ## FMC_LPC_CLK0_M2C_N
set_property -dict {PACKAGE_PIN L21 IOSTANDARD LVCMOS25} [get_ports ad7768_0_sync_in] ; ## FMC_LPC_LA06_P
set_property -dict {PACKAGE_PIN M19 IOSTANDARD LVCMOS25} [get_ports ad7768_0_mclk] ; ## FMC_LPC_LA00_CC_P
set_property -dict {PACKAGE_PIN K18 IOSTANDARD LVCMOS25 IOB TRUE} [get_ports ad7768_1_drdy] ; ## FMC_LPC_LA05_N
set_property -dict {PACKAGE_PIN T16 IOSTANDARD LVCMOS25} [get_ports ad7768_1_sync_out] ; ## FMC_LPC_LA07_P
set_property -dict {PACKAGE_PIN L22 IOSTANDARD LVCMOS25} [get_ports ad7768_1_sync_in] ; ## FMC_LPC_LA06_N
set_property -dict {PACKAGE_PIN M19 IOSTANDARD LVCMOS25} [get_ports ad7768_1_mclk] ; ## FMC_LPC_LA00_CC_P
set_property -dict {PACKAGE_PIN L18 IOSTANDARD LVCMOS25} [get_ports ad7768_mclk_return] ; ## FMC_LPC_LA00_CC_P

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source ../../scripts/adi_env.tcl
source $ad_hdl_dir/projects/scripts/adi_project.tcl
source $ad_hdl_dir/projects/scripts/adi_board.tcl
adi_project_create ad77681evb_zed
adi_project_files ad77681evb_zed [list \
"$ad_hdl_dir/library/xilinx/common/ad_iobuf.v" \
"$ad_hdl_dir/library/xilinx/common/ad_cmos_clk.v" \
"system_top.v" \
"system_constr.xdc" \
"$ad_hdl_dir/projects/common/zed/zed_system_constr.xdc"]
adi_project_run ad77681evb_zed

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// ***************************************************************************
// ***************************************************************************
// Copyright 2016(c) Analog Devices, Inc.
//
// All rights reserved.
//
// Redistribution and use in source and binary forms, with or without modification,
// are permitted provided that the following conditions are met:
// - Redistributions of source code must retain the above copyright
// notice, this list of conditions and the following disclaimer.
// - Redistributions in binary form must reproduce the above copyright
// notice, this list of conditions and the following disclaimer in
// the documentation and/or other materials provided with the
// distribution.
// - Neither the name of Analog Devices, Inc. nor the names of its
// contributors may be used to endorse or promote products derived
// from this software without specific prior written permission.
// - The use of this software may or may not infringe the patent rights
// of one or more patent holders. This license does not release you
// from the requirement that you obtain separate licenses from these
// patent holders to use this software.
// - Use of the software either in source or binary form, must be run
// on or directly connected to an Analog Devices Inc. component.
//
// THIS SOFTWARE IS PROVIDED BY ANALOG DEVICES "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
// INCLUDING, BUT NOT LIMITED TO, NON-INFRINGEMENT, MERCHANTABILITY AND FITNESS FOR A
// PARTICULAR PURPOSE ARE DISCLAIMED.
//
// IN NO EVENT SHALL ANALOG DEVICES BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
// EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, INTELLECTUAL PROPERTY
// RIGHTS, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
// BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
// STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF
// THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
// ***************************************************************************
// ***************************************************************************
// ***************************************************************************
// ***************************************************************************
`timescale 1ns/100ps
module system_top (
inout [14:0] ddr_addr,
inout [ 2:0] ddr_ba,
inout ddr_cas_n,
inout ddr_ck_n,
inout ddr_ck_p,
inout ddr_cke,
inout ddr_cs_n,
inout [ 3:0] ddr_dm,
inout [31:0] ddr_dq,
inout [ 3:0] ddr_dqs_n,
inout [ 3:0] ddr_dqs_p,
inout ddr_odt,
inout ddr_ras_n,
inout ddr_reset_n,
inout ddr_we_n,
inout fixed_io_ddr_vrn,
inout fixed_io_ddr_vrp,
inout [53:0] fixed_io_mio,
inout fixed_io_ps_clk,
inout fixed_io_ps_porb,
inout fixed_io_ps_srstb,
inout [31:0] gpio_bd,
output hdmi_out_clk,
output hdmi_vsync,
output hdmi_hsync,
output hdmi_data_e,
output [15:0] hdmi_data,
output spdif,
output i2s_mclk,
output i2s_bclk,
output i2s_lrclk,
output i2s_sdata_out,
input i2s_sdata_in,
inout iic_scl,
inout iic_sda,
inout [ 1:0] iic_mux_scl,
inout [ 1:0] iic_mux_sda,
input otg_vbusoc,
inout ad7768_0_reset,
inout ad7768_0_sync_out,
inout ad7768_0_sync_in,
inout [ 3:0] ad7768_0_gpio,
inout ad7768_1_reset,
inout ad7768_1_sync_out,
inout ad7768_1_sync_in,
inout [ 3:0] ad7768_1_gpio,
input ad7768_0_mclk,
input ad7768_1_mclk,
output ad7768_mclk_return,
input ad7768_0_spi_miso,
output ad7768_0_spi_mosi,
output ad7768_0_spi_sclk,
output ad7768_0_spi_cs,
input ad7768_0_drdy,
input ad7768_1_spi_miso,
output ad7768_1_spi_mosi,
output ad7768_1_spi_sclk,
output ad7768_1_spi_cs,
input ad7768_1_drdy);
// internal signals
wire [63:0] gpio_i;
wire [63:0] gpio_o;
wire [63:0] gpio_t;
wire [ 1:0] iic_mux_scl_i_s;
wire [ 1:0] iic_mux_scl_o_s;
wire iic_mux_scl_t_s;
wire [ 1:0] iic_mux_sda_i_s;
wire [ 1:0] iic_mux_sda_o_s;
wire iic_mux_sda_t_s;
wire ad7768_0_mclk_s;
wire ad7768_1_mclk_s;
// instantiations
ad_cmos_clk i_ad7768_0_mclk_receiver(
.rst (1'b1),
.locked (),
.clk_in (ad7768_0_mclk),
.clk(ad7768_0_mclk_s));
ad_cmos_clk i_ad7768_1_mclk_receiver(
.rst (1'b1),
.locked (),
.clk_in (ad7768_1_mclk),
.clk(ad7768_1_mclk_s));
assign ad7768_mclk_return = ad7768_0_mclk_s;
ad_iobuf #(
.DATA_WIDTH(7)
) i_iobuf_ad7768_1_gpio (
.dio_t(gpio_t[54:48]),
.dio_i(gpio_o[54:48]),
.dio_o(gpio_i[54:48]),
.dio_p({ad7768_1_gpio,
ad7768_1_sync_in,
ad7768_1_sync_out,
ad7768_1_reset}));
ad_iobuf #(
.DATA_WIDTH(7)
) i_iobuf_ad7768_0_gpio (
.dio_t(gpio_t[38:32]),
.dio_i(gpio_o[38:32]),
.dio_o(gpio_i[38:32]),
.dio_p({ad7768_0_gpio,
ad7768_0_sync_in,
ad7768_0_sync_out,
ad7768_0_reset}));
ad_iobuf #(
.DATA_WIDTH(32)
) i_iobuf (
.dio_t(gpio_t[31:0]),
.dio_i(gpio_o[31:0]),
.dio_o(gpio_i[31:0]),
.dio_p(gpio_bd));
ad_iobuf #(
.DATA_WIDTH(2)
) i_iic_mux_scl (
.dio_t({iic_mux_scl_t_s, iic_mux_scl_t_s}),
.dio_i(iic_mux_scl_o_s),
.dio_o(iic_mux_scl_i_s),
.dio_p(iic_mux_scl));
ad_iobuf #(
.DATA_WIDTH(2)
) i_iic_mux_sda (
.dio_t({iic_mux_sda_t_s, iic_mux_sda_t_s}),
.dio_i(iic_mux_sda_o_s),
.dio_o(iic_mux_sda_i_s),
.dio_p(iic_mux_sda));
system_wrapper i_system_wrapper (
.ddr_addr (ddr_addr),
.ddr_ba (ddr_ba),
.ddr_cas_n (ddr_cas_n),
.ddr_ck_n (ddr_ck_n),
.ddr_ck_p (ddr_ck_p),
.ddr_cke (ddr_cke),
.ddr_cs_n (ddr_cs_n),
.ddr_dm (ddr_dm),
.ddr_dq (ddr_dq),
.ddr_dqs_n (ddr_dqs_n),
.ddr_dqs_p (ddr_dqs_p),
.ddr_odt (ddr_odt),
.ddr_ras_n (ddr_ras_n),
.ddr_reset_n (ddr_reset_n),
.ddr_we_n (ddr_we_n),
.fixed_io_ddr_vrn (fixed_io_ddr_vrn),
.fixed_io_ddr_vrp (fixed_io_ddr_vrp),
.fixed_io_mio (fixed_io_mio),
.fixed_io_ps_clk (fixed_io_ps_clk),
.fixed_io_ps_porb (fixed_io_ps_porb),
.fixed_io_ps_srstb (fixed_io_ps_srstb),
.gpio_i (gpio_i),
.gpio_o (gpio_o),
.gpio_t (gpio_t),
.hdmi_data (hdmi_data),
.hdmi_data_e (hdmi_data_e),
.hdmi_hsync (hdmi_hsync),
.hdmi_out_clk (hdmi_out_clk),
.hdmi_vsync (hdmi_vsync),
.i2s_bclk (i2s_bclk),
.i2s_lrclk (i2s_lrclk),
.i2s_mclk (i2s_mclk),
.i2s_sdata_in (i2s_sdata_in),
.i2s_sdata_out (i2s_sdata_out),
.iic_fmc_scl_io (iic_scl),
.iic_fmc_sda_io (iic_sda),
.iic_mux_scl_i (iic_mux_scl_i_s),
.iic_mux_scl_o (iic_mux_scl_o_s),
.iic_mux_scl_t (iic_mux_scl_t_s),
.iic_mux_sda_i (iic_mux_sda_i_s),
.iic_mux_sda_o (iic_mux_sda_o_s),
.iic_mux_sda_t (iic_mux_sda_t_s),
.ps_intr_00 (1'b0),
.ps_intr_01 (1'b0),
.ps_intr_02 (1'b0),
.ps_intr_03 (1'b0),
.ps_intr_04 (1'b0),
.ps_intr_05 (1'b0),
.ps_intr_06 (1'b0),
.ps_intr_07 (1'b0),
.ps_intr_08 (1'b0),
.ps_intr_09 (1'b0),
.otg_vbusoc (otg_vbusoc),
.spdif (spdif),
.adc1_spi_sdo (ad7768_0_spi_mosi),
.adc1_spi_sdo_t (),
.adc1_spi_sdi (ad7768_0_spi_miso),
.adc1_spi_cs (ad7768_0_spi_cs),
.adc1_spi_sclk (ad7768_0_spi_sclk),
.adc1_data_ready (ad7768_0_drdy),
.adc2_spi_sdo (ad7768_1_spi_mosi),
.adc2_spi_sdo_t (),
.adc2_spi_sdi (ad7768_1_spi_miso),
.adc2_spi_cs (ad7768_1_spi_cs),
.adc2_spi_sclk (ad7768_1_spi_sclk),
.adc2_data_ready (ad7768_1_drdy));
endmodule
// ***************************************************************************
// ***************************************************************************