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adrv9009zu11eg: Extend SPI connection to the PL HD PINS expansion

main
Adrian Costina 2019-05-20 13:05:53 +01:00
parent d2817863a1
commit 645696e5b4
3 changed files with 47 additions and 22 deletions
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12
projects/adrv9009zu11eg/adrv2crr_fmc/system_top.v
View File

@ -52,6 +52,10 @@ module system_top (
inout pmod0_d5, inout pmod0_d5,
inout pmod0_d6, inout pmod0_d6,
inout pmod0_d7, inout pmod0_d7,
output gpio_0_exp_n, //CS
output gpio_0_exp_p, //MOSI
input gpio_1_exp_n, //MISO
output gpio_1_exp_p, //SCK
output led_gpio_0, output led_gpio_0,
output led_gpio_1, output led_gpio_1,
output led_gpio_2, output led_gpio_2,
@ -234,6 +238,7 @@ module system_top (
wire tx_sync; wire tx_sync;
wire spi_mosi; wire spi_mosi;
wire spi0_miso; wire spi0_miso;
wire spi_miso_s;
reg [7:0] spi_3_to_8_csn; reg [7:0] spi_3_to_8_csn;
@ -243,6 +248,7 @@ module system_top (
3'h1: spi_3_to_8_csn = 8'b11111101; 3'h1: spi_3_to_8_csn = 8'b11111101;
3'h2: spi_3_to_8_csn = 8'b11111011; 3'h2: spi_3_to_8_csn = 8'b11111011;
3'h3: spi_3_to_8_csn = 8'b11110111; 3'h3: spi_3_to_8_csn = 8'b11110111;
3'h4: spi_3_to_8_csn = 8'b11101111;
default: spi_3_to_8_csn = 8'b11111111; default: spi_3_to_8_csn = 8'b11111111;
endcase endcase
end end
@ -251,12 +257,16 @@ module system_top (
assign spi_csn_adrv9009_b = spi_3_to_8_csn[1]; assign spi_csn_adrv9009_b = spi_3_to_8_csn[1];
assign spi_csn_hmc7044 = spi_3_to_8_csn[2]; assign spi_csn_hmc7044 = spi_3_to_8_csn[2];
assign spi_csn_hmc7044_car = spi_3_to_8_csn[3]; assign spi_csn_hmc7044_car = spi_3_to_8_csn[3];
assign gpio_0_exp_n = spi_3_to_8_csn[4];
assign gpio_1_exp_p = spi_clk;
assign gpio_0_exp_p = spi_3_to_8_csn[4] == 1'b0 ? spi_mosi : 1'bZ;
assign spi_miso_s = spi_3_to_8_csn[4] == 1'b0 ? gpio_1_exp_n : spi_miso;
adrv9009zu11eg_spi i_spi ( adrv9009zu11eg_spi i_spi (
.spi_csn(spi_3_to_8_csn), .spi_csn(spi_3_to_8_csn),
.spi_clk(spi_clk), .spi_clk(spi_clk),
.spi_mosi(spi_mosi), .spi_mosi(spi_mosi),
.spi_miso_i(spi_miso), .spi_miso_i(spi_miso_s),
.spi_miso_o(spi0_miso), .spi_miso_o(spi0_miso),
.spi_sdio(spi_sdio)); .spi_sdio(spi_sdio));

12
projects/adrv9009zu11eg/adrv2crr_fmcomms8/system_top.v
View File

@ -52,6 +52,10 @@ module system_top (
inout pmod0_d5, inout pmod0_d5,
inout pmod0_d6, inout pmod0_d6,
inout pmod0_d7, inout pmod0_d7,
output gpio_0_exp_n, //CS
output gpio_0_exp_p, //MOSI
input gpio_1_exp_n, //MISO
output gpio_1_exp_p, //SCK
output led_gpio_0, output led_gpio_0,
output led_gpio_1, output led_gpio_1,
output led_gpio_2, output led_gpio_2,
@ -334,6 +338,7 @@ module system_top (
wire tx_sync; wire tx_sync;
wire spi_mosi; wire spi_mosi;
wire spi0_miso; wire spi0_miso;
wire spi_miso_s;
reg [7:0] spi_3_to_8_csn; reg [7:0] spi_3_to_8_csn;
@ -348,6 +353,7 @@ module system_top (
3'h1: spi_3_to_8_csn = 8'b11111101; 3'h1: spi_3_to_8_csn = 8'b11111101;
3'h2: spi_3_to_8_csn = 8'b11111011; 3'h2: spi_3_to_8_csn = 8'b11111011;
3'h3: spi_3_to_8_csn = 8'b11110111; 3'h3: spi_3_to_8_csn = 8'b11110111;
3'h4: spi_3_to_8_csn = 8'b11101111;
default: spi_3_to_8_csn = 8'b11111111; default: spi_3_to_8_csn = 8'b11111111;
endcase endcase
end end
@ -365,6 +371,10 @@ module system_top (
assign spi_csn_adrv9009_b = spi_3_to_8_csn[1]; assign spi_csn_adrv9009_b = spi_3_to_8_csn[1];
assign spi_csn_hmc7044 = spi_3_to_8_csn[2]; assign spi_csn_hmc7044 = spi_3_to_8_csn[2];
assign spi_csn_hmc7044_car = spi_3_to_8_csn[3]; assign spi_csn_hmc7044_car = spi_3_to_8_csn[3];
assign gpio_0_exp_n = spi_3_to_8_csn[4];
assign gpio_1_exp_p = spi_clk;
assign gpio_0_exp_p = spi_3_to_8_csn[4] == 1'b0 ? spi_mosi : 1'bZ;
assign spi_miso_s = spi_3_to_8_csn[4] == 1'b0 ? gpio_1_exp_n : spi_miso;
assign spi_csn_adrv9009_c = spi_fmcomms8_3_to_8_csn[0]; assign spi_csn_adrv9009_c = spi_fmcomms8_3_to_8_csn[0];
assign spi_csn_adrv9009_d = spi_fmcomms8_3_to_8_csn[1]; assign spi_csn_adrv9009_d = spi_fmcomms8_3_to_8_csn[1];
@ -374,7 +384,7 @@ module system_top (
.spi_csn(spi_3_to_8_csn), .spi_csn(spi_3_to_8_csn),
.spi_clk(spi_clk), .spi_clk(spi_clk),
.spi_mosi(spi_mosi), .spi_mosi(spi_mosi),
.spi_miso_i(spi_miso), .spi_miso_i(spi_miso_s),
.spi_miso_o(spi0_miso), .spi_miso_o(spi0_miso),
.spi_sdio(spi_sdio)); .spi_sdio(spi_sdio));

5
projects/adrv9009zu11eg/common/adrv2crr_fmc_constr.xdc
View File

@ -27,6 +27,11 @@ set_property -dict {PACKAGE_PIN AV14 IOSTANDARD LVCMOS18} [get_ports pb_gpio_1]
set_property -dict {PACKAGE_PIN AT11 IOSTANDARD LVCMOS18} [get_ports pb_gpio_2] set_property -dict {PACKAGE_PIN AT11 IOSTANDARD LVCMOS18} [get_ports pb_gpio_2]
set_property -dict {PACKAGE_PIN AT12 IOSTANDARD LVCMOS18} [get_ports pb_gpio_3] set_property -dict {PACKAGE_PIN AT12 IOSTANDARD LVCMOS18} [get_ports pb_gpio_3]
set_property -dict {PACKAGE_PIN AM16 IOSTANDARD LVCMOS18} [get_ports gpio_0_exp_n]
set_property -dict {PACKAGE_PIN AL16 IOSTANDARD LVCMOS18} [get_ports gpio_0_exp_p]
set_property -dict {PACKAGE_PIN AK17 IOSTANDARD LVCMOS18} [get_ports gpio_1_exp_n]
set_property -dict {PACKAGE_PIN AJ17 IOSTANDARD LVCMOS18} [get_ports gpio_1_exp_p]
set_property -dict {PACKAGE_PIN AR19 IOSTANDARD LVCMOS18} [get_ports resetb_ad9545] set_property -dict {PACKAGE_PIN AR19 IOSTANDARD LVCMOS18} [get_ports resetb_ad9545]
set_property -dict {PACKAGE_PIN AP19 IOSTANDARD LVCMOS18} [get_ports hmc7044_car_reset] set_property -dict {PACKAGE_PIN AP19 IOSTANDARD LVCMOS18} [get_ports hmc7044_car_reset]
set_property -dict {PACKAGE_PIN AP20 IOSTANDARD LVCMOS18} [get_ports hmc7044_car_gpio_1] set_property -dict {PACKAGE_PIN AP20 IOSTANDARD LVCMOS18} [get_ports hmc7044_car_gpio_1]