diff --git a/docs/index.rst b/docs/index.rst index c3fb8634c..cd8140e28 100755 --- a/docs/index.rst +++ b/docs/index.rst @@ -20,6 +20,7 @@ HDL Reference Designs :caption: Projects :hidden: + AD469X-FMC AD7616-SDZ AD9081-FMCA-EBZ/AD9082-FMCA-EBZ AD9783-EBZ diff --git a/docs/projects/ad469x_fmc/ad469x_hdl.svg b/docs/projects/ad469x_fmc/ad469x_hdl.svg new file mode 100644 index 000000000..21b4e3016 --- /dev/null +++ b/docs/projects/ad469x_fmc/ad469x_hdl.svg @@ -0,0 +1,2060 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + image/svg+xml + + + + + + + + + + + + + + + + + + + + + + Ethernet + UART + DDRx + SPI + I2C + Interrupts + + Timer + + + MEMORY INTERCONNECT + Zedboard + + + FMC CONNECTOR + + + AD469X_DMA + 80MHz + + + + ARM (Zynq) + Zynq SoC + + + + + + MISO/SDI + SPI ENGINE FRAMEWORK + BUSY + CS + MOSI/SDO + SCLK + + + + + + AXIREGMAP + + INTER-CONNECT + + + EXECUTION + + OFFLOAD + + + + + AXI PULSEGEN + + CNV + + AXI CLKGEN + spi_clk = 160MHz + sys_clk = 100MHz + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + 32b + + + 32b + trigger + + diff --git a/docs/projects/ad469x_fmc/index.rst b/docs/projects/ad469x_fmc/index.rst new file mode 100755 index 000000000..de16ef28d --- /dev/null +++ b/docs/projects/ad469x_fmc/index.rst @@ -0,0 +1,237 @@ +.. _ad469x_fmc: + +AD469X-FMC HDL project +=============================================================================== + +Overview +------------------------------------------------------------------------------- + +The AD469X HDL reference design provides all the interfaces that are +necessary to interact with the devices on the :adi:`EVAL-AD4696 ` +board. + +The design has a SPI Engine instance to control and acquire data from the +:adi:`AD4696` 16-bit precisions ADC, providing support to capture continuous +samples at maximum sampling rate. Currently the design supports the Zedboard. + +Supported boards +------------------------------------------------------------------------------- + +- :adi:`EVAL-AD4696 ` + +Supported devices +------------------------------------------------------------------------------- + +- :adi:`AD4695` +- :adi:`AD4696` +- :adi:`AD4697` +- :adi:`AD4698` + +Supported carriers +------------------------------------------------------------------------------- + +- :xilinx:`ZedBoard ` on FMC slot + +Block design +------------------------------------------------------------------------------- + +The reference design uses the standard :ref:`SPI Engine Framework ` +to interface the :adi:`AD4696` ADC in single SDO Mode. The :ref:`SPI Engine +Offload module `, which can be used to capture continuous +data stream at maximum data rate, is triggered by the BUSY signal of the device. + +Block diagram +~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + +.. image:: ad469x_hdl.svg + :width: 800 + :align: center + :alt: AD469X_FMC block diagram + +CPU/Memory interconnects addresses +~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + +===================== ========== +Instance Address +===================== ========== +axi_ad469x_dma 0x44a30000 +spi_clkgen 0x44a70000 +spi_ad469x_axi_regmap 0x44a00000 +ad469x_trigger_gen 0x44b00000 +===================== ========== + +I2C connections +~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + +.. list-table:: + :widths: 20 20 20 20 20 + :header-rows: 1 + + * - I2C type + - I2C manager instance + - Alias + - Address + - I2C subordinate + * - PL + - iic_fmc + - axi_iic_fmc + - 0x4162_0000 + - --- + * - PL + - iic_main + - axi_iic_main + - 0x4160_0000 + - --- + +SPI connections +~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + +.. list-table:: + :widths: 25 25 25 25 + :header-rows: 1 + + * - SPI type + - SPI manager instance + - SPI subordinate + - CS + * - PL + - axi_spi_engine + - ad469x + - 0 + +GPIOs +~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + +The Software GPIO number is calculated as follows: + +- Zynq-7000: if PS7 is used, then offset is 54 + +.. list-table:: + :widths: 25 25 25 25 + :header-rows: 2 + + * - GPIO signal + - Direction + - HDL GPIO EMIO + - Software GPIO + * - + - (from FPGA view) + - + - Zynq-7000 + * - ad469x_resetn + - INOUT + - 32 + - 86 + +Interrupts +~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + +Below are the Programmable Logic interrupts used in this project. + +================ === ========== =========== +Instance name HDL Linux Zynq Actual Zynq +================ === ========== =========== +axi_ad469x_dma 13 57 89 +spi_ad469x 12 56 88 +================ === ========== =========== + +Building the HDL project +------------------------------------------------------------------------------- + +The design is built upon ADI's generic HDL reference design framework. +ADI does not distribute the bit/elf files of these projects so they must be +built from the sources available :git-hdl:`here `. To get the source you must +`clone `__ +the HDL repository, and then build the project as follows: + +**Linux/Cygwin/WSL** + +.. code-block:: + :linenos: + + user@analog:~$ cd hdl/projects/ad469x_fmc/zed + user@analog:~/hdl/projects/ad469x_fmc/zed$ make + +A more comprehensive build guide can be found in the :ref:`build_hdl` user guide. + +Resources +------------------------------------------------------------------------------- + +Systems related +~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + +- :dokuwiki:`AD469X User guide ` + +Hardware related +~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + +- Product datasheet: + + - :adi:`AD4695`/:adi:`AD4696` + - :adi:`AD4697`/:adi:`AD4698` + +- `UG-1882, EVAL-AD4694FMCZ User Guide `__ + +HDL related +~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + +- :git-hdl:`ad469x_fmc HDL project ` +- :ref:`SPI_ENGINE ` + +.. list-table:: + :widths: 30 35 35 + :header-rows: 1 + + * - IP name + - Source code link + - Documentation link + * - AXI_CLKGEN + - :git-hdl:`library/axi_dmac ` + - :dokuwiki:`[Wiki] ` + * - AXI_DMAC + - :git-hdl:`library/axi_dmac ` + - :ref:`here ` + * - AXI_HDMI_TX + - :git-hdl:`library/axi_hdmi_tx ` + - :dokuwiki:`[Wiki] ` + * - AXI_I2S_ADI + - :git-hdl:`library/axi_i2s_adi ` + - --- + * - AXI_PWM_GEN + - :git-hdl:`library/axi_pwm_gen ` + - :dokuwiki:`[Wiki] ` + * - AXI_SPDIF_TX + - :git-hdl:`library/axi_spdif_tx ` + - --- + * - AXI_SPI_ENGINE + - :git-hdl:`library/spi_engine/axi_spi_engine ` + - :ref:`here ` + * - AXI_SYSID + - :git-hdl:`library/axi_sysid ` + - :dokuwiki:`[Wiki] ` + * - SPI_ENGINE_EXECUTION + - :git-hdl:`library/spi_engine/spi_engine_execution ` + - :ref:`here ` + * - SPI_ENGINE_INTERCONNECT + - :git-hdl:`library/spi_engine/spi_engine_interconnect ` + - :ref:`here ` + * - SPI_ENGINE_OFFLOAD + - :git-hdl:`library/spi_engine/spi_engine_offload ` + - :ref:`here ` + * - SYSID_ROM + - :git-hdl:`library/sysid_rom ` + - :dokuwiki:`[Wiki] ` + * - UTIL_I2C_MIXER + - :git-hdl:`library/util_i2c_mixer ` + - :ref:`here ` + +Software related +~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + +- :git-no-os:`No-OS project ` + +- :dokuwiki:`How to build No-OS ` + +.. include:: ../common/more_information.rst + +.. include:: ../common/support.rst