From 6a583a8acec1b9969d5f1ba97d66ee859647617a Mon Sep 17 00:00:00 2001 From: "Liviu.Iacob" Date: Tue, 27 Sep 2022 14:44:58 +0100 Subject: [PATCH] projects/fmcomms8: Expose jesd params, add support for TX_JESD_L=4 --- projects/fmcomms8/common/fmcomms8_bd.tcl | 93 +++++++++++++-------- projects/fmcomms8/zcu102/system_project.tcl | 12 ++- 2 files changed, 67 insertions(+), 38 deletions(-) diff --git a/projects/fmcomms8/common/fmcomms8_bd.tcl b/projects/fmcomms8/common/fmcomms8_bd.tcl index 233711ef6..39cd1393b 100644 --- a/projects/fmcomms8/common/fmcomms8_bd.tcl +++ b/projects/fmcomms8/common/fmcomms8_bd.tcl @@ -7,40 +7,54 @@ create_bd_port -dir I core_clk_d create_bd_port -dir I dac_fifo_bypass -# TX parameters -set TX_NUM_OF_LANES 8 ; # L -set TX_NUM_OF_CONVERTERS 8 ; # M -set TX_SAMPLES_PER_FRAME 1 ; # S -set TX_SAMPLE_WIDTH 16 ; # N/NP +# +# Parameter description: +# [TX/RX/RX_OS]_JESD_M : Number of converters per link +# [TX/RX/RX_OS]_JESD_L : Number of lanes per link +# [TX/RX/RX_OS]_JESD_S : Number of samples per frame +# [TX/RX/RX_OS]_JESD_NP : Number of bits per sample +# -set TX_SAMPLES_PER_CHANNEL 2 ; # L * 32 / (M * N) +set MAX_TX_NUM_OF_LANES 8 +set MAX_RX_NUM_OF_LANES 4 +set MAX_RX_OS_NUM_OF_LANES 4 + +# TX parameters +set TX_NUM_OF_LANES $ad_project_params(TX_JESD_L) ; # L +set TX_NUM_OF_CONVERTERS $ad_project_params(TX_JESD_M) ; # M +set TX_SAMPLES_PER_FRAME $ad_project_params(TX_JESD_S) ; # S +set TX_SAMPLE_WIDTH 16 ; # N/NP + +set TX_SAMPLES_PER_CHANNEL [expr $TX_NUM_OF_LANES * 32 / \ + ($TX_NUM_OF_CONVERTERS * $TX_SAMPLE_WIDTH)] ; # L * 32 / (M * N) # RX parameters -set RX_NUM_OF_LANES 4 ; # L -set RX_NUM_OF_CONVERTERS 8 ; # M -set RX_SAMPLES_PER_FRAME 1 ; # S -set RX_SAMPLE_WIDTH 16 ; # N/NP +set RX_NUM_OF_LANES $ad_project_params(RX_JESD_L) ; # L +set RX_NUM_OF_CONVERTERS $ad_project_params(RX_JESD_M) ; # M +set RX_SAMPLES_PER_FRAME $ad_project_params(RX_JESD_S) ; # S +set RX_SAMPLE_WIDTH 16 ; # N/NP -set RX_SAMPLES_PER_CHANNEL 1 ; # L * 32 / (M * N) +set RX_SAMPLES_PER_CHANNEL [expr $RX_NUM_OF_LANES * 32 / \ + ($RX_NUM_OF_CONVERTERS * $RX_SAMPLE_WIDTH)] ; # L * 32 / (M * N) # RX Observation parameters -set OBS_NUM_OF_LANES 4 ; # L -set OBS_NUM_OF_CONVERTERS 4 ; # M -set OBS_SAMPLES_PER_FRAME 1 ; # S -set OBS_SAMPLE_WIDTH 16 ; # N/NP +set RX_OS_NUM_OF_LANES $ad_project_params(RX_OS_JESD_L) ; # L +set RX_OS_NUM_OF_CONVERTERS $ad_project_params(RX_OS_JESD_M) ; # M +set RX_OS_SAMPLES_PER_FRAME $ad_project_params(RX_OS_JESD_S) ; # S +set RX_OS_SAMPLE_WIDTH 16 ; # N/NP -set OBS_SAMPLES_PER_CHANNEL 2 ; # L * 32 / (M * N) +set RX_OS_SAMPLES_PER_CHANNEL [expr $RX_OS_NUM_OF_LANES * 32 / \ + ($RX_OS_NUM_OF_CONVERTERS * $RX_OS_SAMPLE_WIDTH)] ; # L * 32 / (M * N) source $ad_hdl_dir/library/jesd204/scripts/jesd204.tcl set dac_fifo_name axi_adrv9009_fmc_tx_fifo -set dac_data_width 256 -set dac_dma_data_width 256 +set dac_data_width [expr $TX_SAMPLE_WIDTH * $TX_NUM_OF_CONVERTERS * $TX_SAMPLES_PER_CHANNEL] -ad_dacfifo_create $dac_fifo_name $dac_data_width $dac_dma_data_width $dac_fifo_address_width +ad_dacfifo_create $dac_fifo_name $dac_data_width $dac_data_width $dac_fifo_address_width ad_ip_instance axi_adxcvr axi_adrv9009_fmc_tx_xcvr -ad_ip_parameter axi_adrv9009_fmc_tx_xcvr CONFIG.NUM_OF_LANES $TX_NUM_OF_LANES +ad_ip_parameter axi_adrv9009_fmc_tx_xcvr CONFIG.NUM_OF_LANES $MAX_TX_NUM_OF_LANES ad_ip_parameter axi_adrv9009_fmc_tx_xcvr CONFIG.QPLL_ENABLE 1 ad_ip_parameter axi_adrv9009_fmc_tx_xcvr CONFIG.TX_OR_RX_N 1 @@ -65,13 +79,13 @@ ad_ip_parameter axi_adrv9009_fmc_tx_dma CONFIG.CYCLIC 1 ad_ip_parameter axi_adrv9009_fmc_tx_dma CONFIG.AXI_SLICE_SRC 1 ad_ip_parameter axi_adrv9009_fmc_tx_dma CONFIG.AXI_SLICE_DEST 1 ad_ip_parameter axi_adrv9009_fmc_tx_dma CONFIG.DMA_2D_TRANSFER 0 -ad_ip_parameter axi_adrv9009_fmc_tx_dma CONFIG.DMA_DATA_WIDTH_DEST 256 +ad_ip_parameter axi_adrv9009_fmc_tx_dma CONFIG.DMA_DATA_WIDTH_DEST $dac_data_width ad_ip_parameter axi_adrv9009_fmc_tx_dma CONFIG.DMA_DATA_WIDTH_SRC 128 ad_ip_parameter axi_adrv9009_fmc_tx_dma CONFIG.FIFO_SIZE 32 ad_ip_parameter axi_adrv9009_fmc_tx_dma CONFIG.MAX_BYTES_PER_BURST 512 ad_ip_instance axi_adxcvr axi_adrv9009_fmc_rx_xcvr -ad_ip_parameter axi_adrv9009_fmc_rx_xcvr CONFIG.NUM_OF_LANES $RX_NUM_OF_LANES +ad_ip_parameter axi_adrv9009_fmc_rx_xcvr CONFIG.NUM_OF_LANES $MAX_RX_NUM_OF_LANES ad_ip_parameter axi_adrv9009_fmc_rx_xcvr CONFIG.QPLL_ENABLE 0 ad_ip_parameter axi_adrv9009_fmc_rx_xcvr CONFIG.TX_OR_RX_N 0 @@ -96,26 +110,26 @@ ad_ip_parameter axi_adrv9009_fmc_rx_dma CONFIG.SYNC_TRANSFER_START 0 ad_ip_parameter axi_adrv9009_fmc_rx_dma CONFIG.AXI_SLICE_SRC 1 ad_ip_parameter axi_adrv9009_fmc_rx_dma CONFIG.AXI_SLICE_DEST 1 ad_ip_parameter axi_adrv9009_fmc_rx_dma CONFIG.DMA_2D_TRANSFER 0 -ad_ip_parameter axi_adrv9009_fmc_rx_dma CONFIG.DMA_DATA_WIDTH_SRC 128 +ad_ip_parameter axi_adrv9009_fmc_rx_dma CONFIG.DMA_DATA_WIDTH_SRC [expr 32*$RX_NUM_OF_LANES] ad_ip_parameter axi_adrv9009_fmc_rx_dma CONFIG.DMA_DATA_WIDTH_DEST 128 ad_ip_instance axi_adxcvr axi_adrv9009_fmc_obs_xcvr -ad_ip_parameter axi_adrv9009_fmc_obs_xcvr CONFIG.NUM_OF_LANES $RX_NUM_OF_LANES +ad_ip_parameter axi_adrv9009_fmc_obs_xcvr CONFIG.NUM_OF_LANES $MAX_RX_OS_NUM_OF_LANES ad_ip_parameter axi_adrv9009_fmc_obs_xcvr CONFIG.QPLL_ENABLE 0 ad_ip_parameter axi_adrv9009_fmc_obs_xcvr CONFIG.TX_OR_RX_N 0 -adi_axi_jesd204_rx_create axi_adrv9009_fmc_obs_jesd $OBS_NUM_OF_LANES +adi_axi_jesd204_rx_create axi_adrv9009_fmc_obs_jesd $RX_OS_NUM_OF_LANES ad_ip_instance util_cpack2 util_fmc_obs_cpack [list \ - NUM_OF_CHANNELS $OBS_NUM_OF_CONVERTERS \ - SAMPLES_PER_CHANNEL $OBS_SAMPLES_PER_CHANNEL\ - SAMPLE_DATA_WIDTH $OBS_SAMPLE_WIDTH \ + NUM_OF_CHANNELS $RX_OS_NUM_OF_CONVERTERS \ + SAMPLES_PER_CHANNEL $RX_OS_SAMPLES_PER_CHANNEL\ + SAMPLE_DATA_WIDTH $RX_OS_SAMPLE_WIDTH \ ] -adi_tpl_jesd204_rx_create obs_adrv9009_fmc_tpl_core $OBS_NUM_OF_LANES \ - $OBS_NUM_OF_CONVERTERS \ - $OBS_SAMPLES_PER_FRAME \ - $OBS_SAMPLE_WIDTH +adi_tpl_jesd204_rx_create obs_adrv9009_fmc_tpl_core $RX_OS_NUM_OF_LANES \ + $RX_OS_NUM_OF_CONVERTERS \ + $RX_OS_SAMPLES_PER_FRAME \ + $RX_OS_SAMPLE_WIDTH ad_ip_instance axi_dmac axi_adrv9009_fmc_obs_dma ad_ip_parameter axi_adrv9009_fmc_obs_dma CONFIG.DMA_TYPE_SRC 2 @@ -125,12 +139,12 @@ ad_ip_parameter axi_adrv9009_fmc_obs_dma CONFIG.SYNC_TRANSFER_START 1 ad_ip_parameter axi_adrv9009_fmc_obs_dma CONFIG.AXI_SLICE_SRC 1 ad_ip_parameter axi_adrv9009_fmc_obs_dma CONFIG.AXI_SLICE_DEST 1 ad_ip_parameter axi_adrv9009_fmc_obs_dma CONFIG.DMA_2D_TRANSFER 0 -ad_ip_parameter axi_adrv9009_fmc_obs_dma CONFIG.DMA_DATA_WIDTH_SRC 128 +ad_ip_parameter axi_adrv9009_fmc_obs_dma CONFIG.DMA_DATA_WIDTH_SRC [expr 32*$RX_OS_NUM_OF_LANES] ad_ip_parameter axi_adrv9009_fmc_obs_dma CONFIG.DMA_DATA_WIDTH_DEST 128 ad_ip_instance util_adxcvr util_adrv9009_fmc_xcvr -ad_ip_parameter util_adrv9009_fmc_xcvr CONFIG.RX_NUM_OF_LANES [expr $RX_NUM_OF_LANES+$OBS_NUM_OF_LANES] -ad_ip_parameter util_adrv9009_fmc_xcvr CONFIG.TX_NUM_OF_LANES $TX_NUM_OF_LANES +ad_ip_parameter util_adrv9009_fmc_xcvr CONFIG.RX_NUM_OF_LANES [expr $MAX_RX_NUM_OF_LANES+$MAX_RX_OS_NUM_OF_LANES] +ad_ip_parameter util_adrv9009_fmc_xcvr CONFIG.TX_NUM_OF_LANES $MAX_TX_NUM_OF_LANES ad_ip_parameter util_adrv9009_fmc_xcvr CONFIG.TX_OUT_DIV 2 ad_ip_parameter util_adrv9009_fmc_xcvr CONFIG.CPLL_FBDIV 4 ad_ip_parameter util_adrv9009_fmc_xcvr CONFIG.RX_CLK25_DIV 10 @@ -162,7 +176,12 @@ ad_xcvrpll axi_adrv9009_fmc_obs_xcvr/up_pll_rst util_adrv9009_fmc_xcvr/up_cpll_ ad_connect sys_cpu_resetn util_adrv9009_fmc_xcvr/up_rstn ad_connect sys_cpu_clk util_adrv9009_fmc_xcvr/up_clk -ad_xcvrcon util_adrv9009_fmc_xcvr axi_adrv9009_fmc_tx_xcvr axi_adrv9009_fmc_tx_jesd {1 0 2 3 4 5 6 7} core_clk_c +if {$TX_NUM_OF_LANES == 8} { + ad_xcvrcon util_adrv9009_fmc_xcvr axi_adrv9009_fmc_tx_xcvr axi_adrv9009_fmc_tx_jesd {1 0 2 3 4 5 6 7} core_clk_c +} else { + #TX_JESD_L=4, it is recommanded to use RX_OS_JESD_M=TX_JESD_M because they share the same device clock + ad_xcvrcon util_adrv9009_fmc_xcvr axi_adrv9009_fmc_tx_xcvr axi_adrv9009_fmc_tx_jesd {1 0 2 3 4 5 6 7} core_clk_c {} $MAX_TX_NUM_OF_LANES {1 0 4 5} +} ad_xcvrcon util_adrv9009_fmc_xcvr axi_adrv9009_fmc_rx_xcvr axi_adrv9009_fmc_rx_jesd {0 1 4 5} core_clk_d ad_xcvrcon util_adrv9009_fmc_xcvr axi_adrv9009_fmc_obs_xcvr axi_adrv9009_fmc_obs_jesd {2 3 6 7} core_clk_c @@ -225,7 +244,7 @@ ad_connect core_clk_c_rstgen/peripheral_reset util_fmc_obs_cpack/reset ad_connect core_clk_c axi_adrv9009_fmc_obs_dma/fifo_wr_clk ad_connect obs_adrv9009_fmc_tpl_core/adc_valid_0 util_fmc_obs_cpack/fifo_wr_en -for {set i 0} {$i < $OBS_NUM_OF_CONVERTERS} {incr i} { +for {set i 0} {$i < $RX_OS_NUM_OF_CONVERTERS} {incr i} { ad_connect obs_adrv9009_fmc_tpl_core/adc_enable_$i util_fmc_obs_cpack/enable_$i ad_connect obs_adrv9009_fmc_tpl_core/adc_data_$i util_fmc_obs_cpack/fifo_wr_data_$i } diff --git a/projects/fmcomms8/zcu102/system_project.tcl b/projects/fmcomms8/zcu102/system_project.tcl index bce46c229..bc28d85eb 100644 --- a/projects/fmcomms8/zcu102/system_project.tcl +++ b/projects/fmcomms8/zcu102/system_project.tcl @@ -3,7 +3,17 @@ source ../../../scripts/adi_env.tcl source $ad_hdl_dir/projects/scripts/adi_project_xilinx.tcl source $ad_hdl_dir/projects/scripts/adi_board.tcl -adi_project fmcomms8_zcu102 +adi_project fmcomms8_zcu102 0 [list \ + RX_JESD_M [get_env_param RX_JESD_M 8 ] \ + RX_JESD_L [get_env_param RX_JESD_L 4 ] \ + RX_JESD_S [get_env_param RX_JESD_S 1 ] \ + TX_JESD_M [get_env_param TX_JESD_M 8 ] \ + TX_JESD_L [get_env_param TX_JESD_L 8 ] \ + TX_JESD_S [get_env_param TX_JESD_S 1 ] \ + RX_OS_JESD_M [get_env_param RX_OS_JESD_M 4 ] \ + RX_OS_JESD_L [get_env_param RX_OS_JESD_L 4 ] \ + RX_OS_JESD_S [get_env_param RX_OS_JESD_S 1 ] \ +] adi_project_files fmcomms8_zcu102 [list \ "system_top.v" \ "system_constr.xdc"\