fmcomms2: ZC706 modified constraints for linux build machines

The added constraints allow the project to successfully pass timing on some ubuntu or debian build machines.
main
Adrian Costina 2014-08-01 17:34:36 +03:00
parent 08a12aaf23
commit 6c6cab0e16
2 changed files with 7 additions and 0 deletions

View File

@ -67,8 +67,13 @@ create_clock -name m200_clk -period 5.00 [get_pins i_system_wrapper/system_
create_clock -name hdmi_clk -period 6.73 [get_pins i_system_wrapper/system_i/axi_hdmi_clkgen/clk_0]
create_clock -name spdif_clk -period 50.00 [get_pins i_system_wrapper/system_i/sys_audio_clkgen/clk_out1]
create_clock -name ps7_clk_0 -period 10.00 [get_pins i_system_wrapper/system_i/sys_ps7/inst/PS7_i/FCLKCLK[0]]
create_clock -name ps7_clk_1 -period 10.00 [get_pins i_system_wrapper/system_i/sys_ps7/inst/PS7_i/FCLKCLK[1]]
set_clock_groups -asynchronous -group {cpu_clk}
set_clock_groups -asynchronous -group {m200_clk}
set_clock_groups -asynchronous -group {hdmi_clk}
set_clock_groups -asynchronous -group {spdif_clk}
set_clock_groups -asynchronous -group {ps7_clk_0}
set_clock_groups -asynchronous -group {ps7_clk_1}

View File

@ -63,7 +63,9 @@ set_property -dict {PACKAGE_PIN AJ29 IOSTANDARD LVCMOS25} [get_ports spi_miso
create_clock -name rx_clk -period 4.00 [get_ports rx_clk_in_p]
create_clock -name ad9361_clk -period 4.00 [get_pins i_system_wrapper/system_i/axi_ad9361/clk]
create_clock -name fmc_dma_clk -period 10.00 [get_pins i_system_wrapper/system_i/sys_ps7/FCLK_CLK2]
create_clock -name ps7_clk_2 -period 10.00 [get_pins i_system_wrapper/system_i/sys_ps7/inst/PS7_i/FCLKCLK[2]]
set_clock_groups -asynchronous -group {ad9361_clk}
set_clock_groups -asynchronous -group {fmc_dma_clk}
set_clock_groups -asynchronous -group {ps7_clk_2}