daq3:qsys: use bundled AXIS interface
parent
089cd882bc
commit
6c6d14722d
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@ -68,15 +68,13 @@ set_instance_parameter_value axi_ad9152_dma {SYNC_TRANSFER_START} {0}
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set_instance_parameter_value axi_ad9152_dma {DMA_TYPE_DEST} {1}
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set_instance_parameter_value axi_ad9152_dma {DMA_TYPE_SRC} {0}
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set_instance_parameter_value axi_ad9152_dma {FIFO_SIZE} {16}
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set_instance_parameter_value axi_ad9152_dma {HAS_AXIS_TLAST} {1}
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add_connection sys_clk.clk avl_ad9152_fifo.if_dma_clk
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add_connection sys_clk.clk_reset avl_ad9152_fifo.if_dma_rst
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add_connection sys_clk.clk axi_ad9152_dma.if_m_axis_aclk
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add_connection axi_ad9152_dma.if_m_axis_valid avl_ad9152_fifo.if_dma_valid
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add_connection axi_ad9152_dma.if_m_axis_data avl_ad9152_fifo.if_dma_data
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add_connection axi_ad9152_dma.if_m_axis_last avl_ad9152_fifo.if_dma_xfer_last
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add_connection axi_ad9152_dma.m_axis avl_ad9152_fifo.s_axis
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add_connection axi_ad9152_dma.if_m_axis_xfer_req avl_ad9152_fifo.if_dma_xfer_req
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add_connection avl_ad9152_fifo.if_dma_ready axi_ad9152_dma.if_m_axis_ready
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add_connection sys_clk.clk_reset axi_ad9152_dma.s_axi_reset
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add_connection sys_clk.clk axi_ad9152_dma.s_axi_clock
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add_connection sys_clk.clk_reset axi_ad9152_dma.m_src_axi_reset
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@ -150,9 +148,7 @@ set_instance_parameter_value axi_ad9680_dma {DMA_TYPE_DEST} {0}
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set_instance_parameter_value axi_ad9680_dma {DMA_TYPE_SRC} {1}
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add_connection sys_clk.clk axi_ad9680_dma.if_s_axis_aclk
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add_connection ad9680_adcfifo.if_dma_wr axi_ad9680_dma.if_s_axis_valid
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add_connection ad9680_adcfifo.if_dma_wdata axi_ad9680_dma.if_s_axis_data
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add_connection ad9680_adcfifo.if_dma_wready axi_ad9680_dma.if_s_axis_ready
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add_connection ad9680_adcfifo.m_axis axi_ad9680_dma.s_axis
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add_connection ad9680_adcfifo.if_dma_xfer_req axi_ad9680_dma.if_s_axis_xfer_req
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add_connection ad9680_adcfifo.if_adc_wovf axi_ad9680_core.if_adc_dovf
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add_connection sys_clk.clk_reset axi_ad9680_dma.s_axi_reset
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