zcy
/
pluto_hdl_adi
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

jesd204: Make character replacement opt in feature 

In order to keep resource utilization low and for better timing closure
allow disabling of the character replacement logic.

If the parameter is set the frame alignment monitoring is limited to links
where scrambling is on.
main
Laszlo Nagy 2020-10-09 07:25:13 +01:00 committed by Laszlo Nagy
parent 7093e10ebf
commit 6ef803e7ab
6 changed files with 24 additions and 13 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

7
library/jesd204/jesd204_common/jesd204_frame_align_replace.v
View File

@ -50,7 +50,8 @@
module jesd204_frame_align_replace #( module jesd204_frame_align_replace #(
parameter DATA_PATH_WIDTH = 4, parameter DATA_PATH_WIDTH = 4,
parameter IS_RX = 1'b1 parameter IS_RX = 1'b1,
parameter ENABLED = 1'b1
) ( ) (
input clk, input clk,
input reset, input reset,
@ -239,7 +240,7 @@ for (ii = 0; ii < DATA_PATH_WIDTH; ii = ii + 1) begin: gen_replace_byte
end end
endgenerate endgenerate
assign data_out = (cfg_disable_char_replacement || !cfg_disable_scrambler) ? data : data_replaced; assign data_out = (cfg_disable_char_replacement || !cfg_disable_scrambler || ENABLED==0) ? data : data_replaced;
assign charisk_out = (IS_RX || !cfg_disable_scrambler || cfg_disable_char_replacement) ? 'b0 : char_is_align; assign charisk_out = (IS_RX || !cfg_disable_scrambler || cfg_disable_char_replacement || ENABLED==0) ? 'b0 : char_is_align;
endmodule endmodule

6
library/jesd204/jesd204_rx/jesd204_rx.v
View File

@ -52,7 +52,8 @@ module jesd204_rx #(
/* Only 4 is supported at the moment for 8b/10b and 8 for 64b */ /* Only 4 is supported at the moment for 8b/10b and 8 for 64b */
parameter DATA_PATH_WIDTH = LINK_MODE == 2 ? 8 : 4, parameter DATA_PATH_WIDTH = LINK_MODE == 2 ? 8 : 4,
parameter ENABLE_FRAME_ALIGN_CHECK = 1, parameter ENABLE_FRAME_ALIGN_CHECK = 1,
parameter ENABLE_FRAME_ALIGN_ERR_RESET = 0 parameter ENABLE_FRAME_ALIGN_ERR_RESET = 0,
parameter ENABLE_CHAR_REPLACE = 0
) ( ) (
input clk, input clk,
input reset, input reset,
@ -338,7 +339,8 @@ for (i = 0; i < NUM_LANES; i = i + 1) begin: gen_lane
.ALIGN_MUX_REGISTERED(ALIGN_MUX_REGISTERED), .ALIGN_MUX_REGISTERED(ALIGN_MUX_REGISTERED),
.SCRAMBLER_REGISTERED(SCRAMBLER_REGISTERED), .SCRAMBLER_REGISTERED(SCRAMBLER_REGISTERED),
.ELASTIC_BUFFER_SIZE(ELASTIC_BUFFER_SIZE), .ELASTIC_BUFFER_SIZE(ELASTIC_BUFFER_SIZE),
.ENABLE_FRAME_ALIGN_CHECK(ENABLE_FRAME_ALIGN_CHECK) .ENABLE_FRAME_ALIGN_CHECK(ENABLE_FRAME_ALIGN_CHECK),
.ENABLE_CHAR_REPLACE(ENABLE_CHAR_REPLACE)
) i_lane ( ) i_lane (
.clk(clk), .clk(clk),
.reset(reset), .reset(reset),

6
library/jesd204/jesd204_rx/jesd204_rx_frame_align.v
View File

@ -45,7 +45,8 @@
`timescale 1ns/100ps `timescale 1ns/100ps
module jesd204_rx_frame_align #( module jesd204_rx_frame_align #(
parameter DATA_PATH_WIDTH = 4 parameter DATA_PATH_WIDTH = 4,
parameter ENABLE_CHAR_REPLACE = 0
) ( ) (
input clk, input clk,
input reset, input reset,
@ -178,7 +179,8 @@ end
jesd204_frame_align_replace #( jesd204_frame_align_replace #(
.DATA_PATH_WIDTH (DATA_PATH_WIDTH), .DATA_PATH_WIDTH (DATA_PATH_WIDTH),
.IS_RX (1'b1) .IS_RX (1'b1),
.ENABLED (ENABLE_CHAR_REPLACE)
) i_align_replace ( ) i_align_replace (
.clk (clk), .clk (clk),
.reset (reset), .reset (reset),

6
library/jesd204/jesd204_rx/jesd204_rx_lane.v
View File

@ -50,7 +50,8 @@ module jesd204_rx_lane #(
parameter ALIGN_MUX_REGISTERED = 0, parameter ALIGN_MUX_REGISTERED = 0,
parameter SCRAMBLER_REGISTERED = 0, parameter SCRAMBLER_REGISTERED = 0,
parameter ELASTIC_BUFFER_SIZE = 256, parameter ELASTIC_BUFFER_SIZE = 256,
parameter ENABLE_FRAME_ALIGN_CHECK = 0 parameter ENABLE_FRAME_ALIGN_CHECK = 0,
parameter ENABLE_CHAR_REPLACE = 0
) ( ) (
input clk, input clk,
input reset, input reset,
@ -255,7 +256,8 @@ pipeline_stage #(
generate generate
if(ENABLE_FRAME_ALIGN_CHECK) begin : gen_frame_align if(ENABLE_FRAME_ALIGN_CHECK) begin : gen_frame_align
jesd204_rx_frame_align #( jesd204_rx_frame_align #(
.DATA_PATH_WIDTH (DATA_PATH_WIDTH) .DATA_PATH_WIDTH (DATA_PATH_WIDTH),
.ENABLE_CHAR_REPLACE (ENABLE_CHAR_REPLACE)
) i_frame_align ( ) i_frame_align (
.clk (clk), .clk (clk),
.reset (buffer_ready_n_s), .reset (buffer_ready_n_s),

6
library/jesd204/jesd204_tx/jesd204_tx.v
View File

@ -50,7 +50,8 @@ module jesd204_tx #(
parameter NUM_OUTPUT_PIPELINE = 0, parameter NUM_OUTPUT_PIPELINE = 0,
parameter LINK_MODE = 1, // 2 - 64B/66B; 1 - 8B/10B parameter LINK_MODE = 1, // 2 - 64B/66B; 1 - 8B/10B
/* Only 4 is supported at the moment for 8b/10b and 8 for 64b */ /* Only 4 is supported at the moment for 8b/10b and 8 for 64b */
parameter DATA_PATH_WIDTH = LINK_MODE[1] ? 8 : 4 parameter DATA_PATH_WIDTH = LINK_MODE[1] ? 8 : 4,
parameter ENABLE_CHAR_REPLACE = 1'b0
) ( ) (
input clk, input clk,
input reset, input reset,
@ -264,7 +265,8 @@ for (i = 0; i < NUM_LANES; i = i + 1) begin: gen_lane
localparam C_STOP = C_START + DATA_PATH_WIDTH-1; localparam C_STOP = C_START + DATA_PATH_WIDTH-1;
jesd204_tx_lane #( jesd204_tx_lane #(
.DATA_PATH_WIDTH(DATA_PATH_WIDTH) .DATA_PATH_WIDTH(DATA_PATH_WIDTH),
.ENABLE_CHAR_REPLACE(ENABLE_CHAR_REPLACE)
) i_lane ( ) i_lane (
.clk(clk), .clk(clk),

6
library/jesd204/jesd204_tx/jesd204_tx_lane.v
View File

@ -45,7 +45,8 @@
`timescale 1ns/100ps `timescale 1ns/100ps
module jesd204_tx_lane #( module jesd204_tx_lane #(
parameter DATA_PATH_WIDTH = 4 parameter DATA_PATH_WIDTH = 4,
parameter ENABLE_CHAR_REPLACE = 1'b0
) ( ) (
input clk, input clk,
@ -119,7 +120,8 @@ pipeline_stage #(
jesd204_frame_align_replace #( jesd204_frame_align_replace #(
.DATA_PATH_WIDTH (DATA_PATH_WIDTH), .DATA_PATH_WIDTH (DATA_PATH_WIDTH),
.IS_RX (1'b0) .IS_RX (1'b0),
.ENABLED (ENABLE_CHAR_REPLACE)
) i_align_replace ( ) i_align_replace (
.clk (clk), .clk (clk),
.reset (~tx_ready_d), .reset (~tx_ready_d),