ad_ip_jesd204_tpl_dac: Add interface definition for the link interface
Add a interface definition for the link interface that combines the valid, ready and data signals into a AXI streaming interface. This allows to connect the interface to the JESD204 link layer peripheral in one go without having to manually connect each signal. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>main
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@ -53,4 +53,14 @@ adi_ip_files ad_ip_jesd204_tpl_dac [list \
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adi_ip_properties ad_ip_jesd204_tpl_dac
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adi_add_bus "link" "master" \
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"xilinx.com:interface:axis_rtl:1.0" \
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"xilinx.com:interface:axis:1.0" \
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[list \
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{"link_ready" "TREADY"} \
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{"link_valid" "TVALID"} \
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{"link_data" "TDATA"} \
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]
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adi_add_bus_clock "link_clk" "link"
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ipx::save_core [ipx::current_core]
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