ad_ip_jesd204_tpl_dac: Add interface definition for the link interface

Add a interface definition for the link interface that combines the valid,
ready and data signals into a AXI streaming interface.

This allows to connect the interface to the JESD204 link layer peripheral
in one go without having to manually connect each signal.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
main
Lars-Peter Clausen 2018-06-15 17:01:18 +02:00 committed by Lars-Peter Clausen
parent ae8ce1ccd8
commit 6fb250ad89
1 changed files with 10 additions and 0 deletions

View File

@ -53,4 +53,14 @@ adi_ip_files ad_ip_jesd204_tpl_dac [list \
adi_ip_properties ad_ip_jesd204_tpl_dac
adi_add_bus "link" "master" \
"xilinx.com:interface:axis_rtl:1.0" \
"xilinx.com:interface:axis:1.0" \
[list \
{"link_ready" "TREADY"} \
{"link_valid" "TVALID"} \
{"link_data" "TDATA"} \
]
adi_add_bus_clock "link_clk" "link"
ipx::save_core [ipx::current_core]