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adrv9009/intel: Use generic TPL cores

main
Istvan Csomortani 2020-05-25 12:20:49 +01:00 committed by István Csomortáni
parent 9c8190f709
commit 71d500bdd4
2 changed files with 112 additions and 50 deletions
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21
projects/adrv9009/common/adrv9009_bd.tcl
View File

@ -5,7 +5,8 @@ set TX_NUM_OF_CONVERTERS 4 ; # M
set TX_SAMPLES_PER_FRAME 1 ; # S
set TX_SAMPLE_WIDTH 16 ; # N/NP
set TX_SAMPLES_PER_CHANNEL 2 ; # L * 32 / (M * N)
set TX_SAMPLES_PER_CHANNEL [expr $TX_NUM_OF_LANES * 32 / \
($TX_NUM_OF_CONVERTERS * $TX_SAMPLE_WIDTH)] ; # L * 32 / (M * N)
# RX parameters
set RX_NUM_OF_LANES 2 ; # L
@ -13,18 +14,20 @@ set RX_NUM_OF_CONVERTERS 4 ; # M
set RX_SAMPLES_PER_FRAME 1 ; # S
set RX_SAMPLE_WIDTH 16 ; # N/NP
set RX_SAMPLES_PER_CHANNEL 1 ; # L * 32 / (M * N)
set RX_SAMPLES_PER_CHANNEL [expr $RX_NUM_OF_LANES * 32 / \
($RX_NUM_OF_CONVERTERS * $RX_SAMPLE_WIDTH)] ; # L * 32 / (M * N)
# RX Observation parameters
set RX_OS_NUM_OF_LANES 2 ; # L
set RX_OS_NUM_OF_CONVERTERS 4 ; # M
set RX_OS_NUM_OF_CONVERTERS 2 ; # M
set RX_OS_SAMPLES_PER_FRAME 1 ; # S
set RX_OS_SAMPLE_WIDTH 16 ; # N/NP
set RX_OS_SAMPLES_PER_CHANNEL 1 ; # L * 32 / (M * N)
set RX_OS_SAMPLES_PER_CHANNEL [expr $RX_NUM_OF_LANES * 32 / \
($RX_NUM_OF_CONVERTERS * $RX_SAMPLE_WIDTH)] ; # L * 32 / (M * N)
set dac_fifo_name axi_adrv9009_dacfifo
set dac_data_width [expr 32*$TX_NUM_OF_LANES]
set dac_data_width [expr $TX_SAMPLE_WIDTH * $TX_NUM_OF_CONVERTERS * $TX_SAMPLES_PER_CHANNEL]
set dac_dma_data_width 128
source $ad_hdl_dir/library/jesd204/scripts/jesd204.tcl
@ -125,7 +128,9 @@ ad_ip_parameter axi_adrv9009_rx_dma CONFIG.ASYNC_CLK_DEST_REQ 1
ad_ip_parameter axi_adrv9009_rx_dma CONFIG.ASYNC_CLK_SRC_DEST 1
ad_ip_parameter axi_adrv9009_rx_dma CONFIG.ASYNC_CLK_REQ_SRC 1
ad_ip_parameter axi_adrv9009_rx_dma CONFIG.DMA_2D_TRANSFER 0
ad_ip_parameter axi_adrv9009_rx_dma CONFIG.DMA_DATA_WIDTH_SRC [expr 32*$RX_NUM_OF_LANES]
ad_ip_parameter axi_adrv9009_rx_dma CONFIG.DMA_DATA_WIDTH_SRC [expr $RX_SAMPLE_WIDTH * \
$RX_NUM_OF_CONVERTERS * \
$RX_SAMPLES_PER_CHANNEL]
ad_ip_parameter axi_adrv9009_rx_dma CONFIG.MAX_BYTES_PER_BURST 256
ad_ip_parameter axi_adrv9009_rx_dma CONFIG.AXI_SLICE_DEST true
ad_ip_parameter axi_adrv9009_rx_dma CONFIG.AXI_SLICE_SRC true
@ -168,7 +173,9 @@ ad_ip_parameter axi_adrv9009_rx_os_dma CONFIG.ASYNC_CLK_DEST_REQ 1
ad_ip_parameter axi_adrv9009_rx_os_dma CONFIG.ASYNC_CLK_SRC_DEST 1
ad_ip_parameter axi_adrv9009_rx_os_dma CONFIG.ASYNC_CLK_REQ_SRC 1
ad_ip_parameter axi_adrv9009_rx_os_dma CONFIG.DMA_2D_TRANSFER 0
ad_ip_parameter axi_adrv9009_rx_os_dma CONFIG.DMA_DATA_WIDTH_SRC [expr 32*$RX_NUM_OF_LANES];
ad_ip_parameter axi_adrv9009_rx_os_dma CONFIG.DMA_DATA_WIDTH_SRC [expr $RX_OS_SAMPLE_WIDTH * \
$RX_OS_NUM_OF_CONVERTERS * \
$RX_OS_SAMPLES_PER_CHANNEL];
ad_ip_parameter axi_adrv9009_rx_os_dma CONFIG.MAX_BYTES_PER_BURST 256
ad_ip_parameter axi_adrv9009_rx_os_dma CONFIG.AXI_SLICE_DEST true
ad_ip_parameter axi_adrv9009_rx_os_dma CONFIG.AXI_SLICE_SRC true

141
projects/adrv9009/common/adrv9009_qsys.tcl
View File

@ -1,3 +1,28 @@
# TX parameters
set TX_NUM_OF_LANES 4 ; # L
set TX_NUM_OF_CONVERTERS 4 ; # M
set TX_SAMPLE_WIDTH 16 ; # N/NP
set TX_SAMPLES_PER_CHANNEL [expr $TX_NUM_OF_LANES * 32 / \
($TX_NUM_OF_CONVERTERS * $TX_SAMPLE_WIDTH)] ; # L * 32 / (M * N)
# RX parameters
set RX_NUM_OF_LANES 2 ; # L
set RX_NUM_OF_CONVERTERS 4 ; # M
set RX_SAMPLE_WIDTH 16 ; # N/NP
set RX_SAMPLES_PER_CHANNEL [expr $RX_NUM_OF_LANES * 32 / \
($RX_NUM_OF_CONVERTERS * $RX_SAMPLE_WIDTH)] ; # L * 32 / (M * N)
# RX Observation parameters
set RX_OS_NUM_OF_LANES 2 ; # L
set RX_OS_NUM_OF_CONVERTERS 2 ; # M
set RX_OS_SAMPLE_WIDTH 16 ; # N/NP
set RX_OS_SAMPLES_PER_CHANNEL [expr $RX_OS_NUM_OF_LANES * 32 / \
($RX_OS_NUM_OF_CONVERTERS * $RX_OS_SAMPLE_WIDTH)] ; # L * 32 / (M * N)
set dac_fifo_name avl_adrv9009_tx_fifo
set dac_data_width 128
set dac_dma_data_width 128
@ -10,7 +35,7 @@ set_instance_parameter_value adrv9009_tx_jesd204 {TX_OR_RX_N} {1}
set_instance_parameter_value adrv9009_tx_jesd204 {SOFT_PCS} {true}
set_instance_parameter_value adrv9009_tx_jesd204 {LANE_RATE} {9830.4}
set_instance_parameter_value adrv9009_tx_jesd204 {REFCLK_FREQUENCY} {245.76}
set_instance_parameter_value adrv9009_tx_jesd204 {NUM_OF_LANES} {4}
set_instance_parameter_value adrv9009_tx_jesd204 {NUM_OF_LANES} $TX_NUM_OF_LANES
set_instance_parameter_value adrv9009_tx_jesd204 {LANE_MAP} {0 3 2 1}
add_connection sys_clk.clk adrv9009_tx_jesd204.sys_clk
@ -32,7 +57,7 @@ set_instance_parameter_value adrv9009_rx_jesd204 {TX_OR_RX_N} {0}
set_instance_parameter_value adrv9009_rx_jesd204 {SOFT_PCS} {true}
set_instance_parameter_value adrv9009_rx_jesd204 {LANE_RATE} {9830.4}
set_instance_parameter_value adrv9009_rx_jesd204 {REFCLK_FREQUENCY} {245.76}
set_instance_parameter_value adrv9009_rx_jesd204 {NUM_OF_LANES} {2}
set_instance_parameter_value adrv9009_rx_jesd204 {NUM_OF_LANES} $RX_NUM_OF_LANES
add_connection sys_clk.clk adrv9009_rx_jesd204.sys_clk
add_connection sys_clk.clk_reset adrv9009_rx_jesd204.sys_resetn
@ -53,7 +78,7 @@ set_instance_parameter_value adrv9009_rx_os_jesd204 {TX_OR_RX_N} {0}
set_instance_parameter_value adrv9009_rx_os_jesd204 {SOFT_PCS} {true}
set_instance_parameter_value adrv9009_rx_os_jesd204 {LANE_RATE} {9830.4}
set_instance_parameter_value adrv9009_rx_os_jesd204 {REFCLK_FREQUENCY} {245.76}
set_instance_parameter_value adrv9009_rx_os_jesd204 {NUM_OF_LANES} {2}
set_instance_parameter_value adrv9009_rx_os_jesd204 {NUM_OF_LANES} $RX_OS_NUM_OF_LANES
add_connection sys_clk.clk adrv9009_rx_os_jesd204.sys_clk
add_connection sys_clk.clk_reset adrv9009_rx_os_jesd204.sys_resetn
@ -66,57 +91,81 @@ set_interface_property rx_os_sysref EXPORT_OF adrv9009_rx_os_jesd204.sysref
add_interface rx_os_sync conduit end
set_interface_property rx_os_sync EXPORT_OF adrv9009_rx_os_jesd204.sync
# adrv9009-core
# adrv9009 TPL cores
add_instance axi_adrv9009 axi_adrv9009
add_connection adrv9009_tx_jesd204.link_clk axi_adrv9009.if_dac_clk
add_connection axi_adrv9009.if_dac_tx_data adrv9009_tx_jesd204.link_data
add_connection adrv9009_rx_jesd204.link_clk axi_adrv9009.if_adc_clk
add_connection adrv9009_rx_jesd204.link_sof axi_adrv9009.if_adc_rx_sof
add_connection adrv9009_rx_jesd204.link_data axi_adrv9009.if_adc_rx_data
add_connection adrv9009_rx_os_jesd204.link_clk axi_adrv9009.if_adc_os_clk
add_connection adrv9009_rx_os_jesd204.link_sof axi_adrv9009.if_adc_rx_os_sof
add_connection adrv9009_rx_os_jesd204.link_data axi_adrv9009.if_adc_rx_os_data
add_connection sys_clk.clk axi_adrv9009.s_axi_clock
add_connection sys_clk.clk_reset axi_adrv9009.s_axi_reset
add_instance axi_adrv9009_tx ad_ip_jesd204_tpl_dac
set_instance_parameter_value axi_adrv9009_tx {ID} {0}
set_instance_parameter_value axi_adrv9009_tx {NUM_CHANNELS} $TX_NUM_OF_CONVERTERS
set_instance_parameter_value axi_adrv9009_tx {NUM_LANES} $TX_NUM_OF_LANES
set_instance_parameter_value axi_adrv9009_tx {BITS_PER_SAMPLE} $TX_SAMPLE_WIDTH
set_instance_parameter_value axi_adrv9009_tx {CONVERTER_RESOLUTION} $TX_SAMPLE_WIDTH
add_instance axi_adrv9009_rx ad_ip_jesd204_tpl_adc
set_instance_parameter_value axi_adrv9009_rx {ID} {0}
set_instance_parameter_value axi_adrv9009_rx {NUM_CHANNELS} $RX_NUM_OF_CONVERTERS
set_instance_parameter_value axi_adrv9009_rx {NUM_LANES} $RX_NUM_OF_LANES
set_instance_parameter_value axi_adrv9009_rx {BITS_PER_SAMPLE} $RX_SAMPLE_WIDTH
set_instance_parameter_value axi_adrv9009_rx {CONVERTER_RESOLUTION} $RX_SAMPLE_WIDTH
set_instance_parameter_value axi_adrv9009_rx {TWOS_COMPLEMENT} {1}
add_instance axi_adrv9009_rx_os ad_ip_jesd204_tpl_adc
set_instance_parameter_value axi_adrv9009_rx_os {ID} {1}
set_instance_parameter_value axi_adrv9009_rx_os {NUM_CHANNELS} $RX_OS_NUM_OF_CONVERTERS
set_instance_parameter_value axi_adrv9009_rx_os {NUM_LANES} $RX_OS_NUM_OF_LANES
set_instance_parameter_value axi_adrv9009_rx_os {BITS_PER_SAMPLE} $RX_OS_SAMPLE_WIDTH
set_instance_parameter_value axi_adrv9009_rx_os {CONVERTER_RESOLUTION} $RX_OS_SAMPLE_WIDTH
set_instance_parameter_value axi_adrv9009_rx_os {TWOS_COMPLEMENT} {1}
add_connection sys_clk.clk axi_adrv9009_tx.s_axi_clock
add_connection sys_clk.clk_reset axi_adrv9009_tx.s_axi_reset
add_connection sys_clk.clk axi_adrv9009_rx.s_axi_clock
add_connection sys_clk.clk_reset axi_adrv9009_rx.s_axi_reset
add_connection sys_clk.clk axi_adrv9009_rx_os.s_axi_clock
add_connection sys_clk.clk_reset axi_adrv9009_rx_os.s_axi_reset
add_connection adrv9009_tx_jesd204.link_clk axi_adrv9009_tx.link_clk
add_connection axi_adrv9009_tx.link_data adrv9009_tx_jesd204.link_data
add_connection adrv9009_rx_jesd204.link_clk axi_adrv9009_rx.link_clk
add_connection adrv9009_rx_jesd204.link_sof axi_adrv9009_rx.if_link_sof
add_connection adrv9009_rx_jesd204.link_data axi_adrv9009_rx.link_data
add_connection adrv9009_rx_os_jesd204.link_clk axi_adrv9009_rx_os.link_clk
add_connection adrv9009_rx_os_jesd204.link_sof axi_adrv9009_rx_os.if_link_sof
add_connection adrv9009_rx_os_jesd204.link_data axi_adrv9009_rx_os.link_data
# pack(s) & unpack(s)
add_instance axi_adrv9009_tx_upack util_upack2
set_instance_parameter_value axi_adrv9009_tx_upack {NUM_OF_CHANNELS} {4}
set_instance_parameter_value axi_adrv9009_tx_upack {SAMPLES_PER_CHANNEL} {2}
set_instance_parameter_value axi_adrv9009_tx_upack {SAMPLE_DATA_WIDTH} {16}
set_instance_parameter_value axi_adrv9009_tx_upack {NUM_OF_CHANNELS} $TX_NUM_OF_CONVERTERS
set_instance_parameter_value axi_adrv9009_tx_upack {SAMPLES_PER_CHANNEL} $TX_SAMPLES_PER_CHANNEL
set_instance_parameter_value axi_adrv9009_tx_upack {SAMPLE_DATA_WIDTH} $TX_SAMPLE_WIDTH
set_instance_parameter_value axi_adrv9009_tx_upack {INTERFACE_TYPE} {1}
add_connection adrv9009_tx_jesd204.link_clk axi_adrv9009_tx_upack.clk
add_connection adrv9009_tx_jesd204.link_reset axi_adrv9009_tx_upack.reset
add_connection axi_adrv9009_tx_upack.dac_ch_0 axi_adrv9009.dac_ch_0
add_connection axi_adrv9009_tx_upack.dac_ch_1 axi_adrv9009.dac_ch_1
add_connection axi_adrv9009_tx_upack.dac_ch_2 axi_adrv9009.dac_ch_2
add_connection axi_adrv9009_tx_upack.dac_ch_3 axi_adrv9009.dac_ch_3
for {set i 0} {$i < $TX_NUM_OF_CONVERTERS} {incr i} {
add_connection axi_adrv9009_tx_upack.dac_ch_$i axi_adrv9009_tx.dac_ch_$i
}
add_instance axi_adrv9009_rx_cpack util_cpack2
set_instance_parameter_value axi_adrv9009_rx_cpack {NUM_OF_CHANNELS} {4}
set_instance_parameter_value axi_adrv9009_rx_cpack {SAMPLES_PER_CHANNEL} {1}
set_instance_parameter_value axi_adrv9009_rx_cpack {SAMPLE_DATA_WIDTH} {16}
set_instance_parameter_value axi_adrv9009_rx_cpack {NUM_OF_CHANNELS} $RX_NUM_OF_CONVERTERS
set_instance_parameter_value axi_adrv9009_rx_cpack {SAMPLES_PER_CHANNEL} $RX_SAMPLES_PER_CHANNEL
set_instance_parameter_value axi_adrv9009_rx_cpack {SAMPLE_DATA_WIDTH} $RX_SAMPLE_WIDTH
add_connection adrv9009_rx_jesd204.link_reset axi_adrv9009_rx_cpack.reset
add_connection adrv9009_rx_jesd204.link_clk axi_adrv9009_rx_cpack.clk
add_connection axi_adrv9009.adc_ch_0 axi_adrv9009_rx_cpack.adc_ch_0
add_connection axi_adrv9009.adc_ch_1 axi_adrv9009_rx_cpack.adc_ch_1
add_connection axi_adrv9009.adc_ch_2 axi_adrv9009_rx_cpack.adc_ch_2
add_connection axi_adrv9009.adc_ch_3 axi_adrv9009_rx_cpack.adc_ch_3
add_connection axi_adrv9009_rx_cpack.if_fifo_wr_overflow axi_adrv9009.if_adc_dovf
for {set i 0} {$i < $RX_NUM_OF_CONVERTERS} {incr i} {
add_connection axi_adrv9009_rx.adc_ch_$i axi_adrv9009_rx_cpack.adc_ch_$i
}
add_connection axi_adrv9009_rx_cpack.if_fifo_wr_overflow axi_adrv9009_rx.if_adc_dovf
add_instance axi_adrv9009_rx_os_cpack util_cpack2
set_instance_parameter_value axi_adrv9009_rx_os_cpack {NUM_OF_CHANNELS} {4}
set_instance_parameter_value axi_adrv9009_rx_os_cpack {SAMPLES_PER_CHANNEL} {2}
set_instance_parameter_value axi_adrv9009_rx_os_cpack {SAMPLE_DATA_WIDTH} {16}
set_instance_parameter_value axi_adrv9009_rx_os_cpack {NUM_OF_CHANNELS} $RX_OS_NUM_OF_CONVERTERS
set_instance_parameter_value axi_adrv9009_rx_os_cpack {SAMPLES_PER_CHANNEL} $RX_OS_SAMPLES_PER_CHANNEL
set_instance_parameter_value axi_adrv9009_rx_os_cpack {SAMPLE_DATA_WIDTH} $RX_OS_SAMPLE_WIDTH
add_connection adrv9009_rx_os_jesd204.link_reset axi_adrv9009_rx_os_cpack.reset
add_connection adrv9009_rx_os_jesd204.link_clk axi_adrv9009_rx_os_cpack.clk
add_connection axi_adrv9009.adc_os_ch_0 axi_adrv9009_rx_os_cpack.adc_ch_0
add_connection axi_adrv9009.adc_os_ch_1 axi_adrv9009_rx_os_cpack.adc_ch_1
add_connection axi_adrv9009.adc_os_ch_2 axi_adrv9009_rx_os_cpack.adc_ch_2
add_connection axi_adrv9009.adc_os_ch_3 axi_adrv9009_rx_os_cpack.adc_ch_3
add_connection axi_adrv9009_rx_os_cpack.if_fifo_wr_overflow axi_adrv9009.if_adc_os_dovf
for {set i 0} {$i < $RX_OS_NUM_OF_CONVERTERS} {incr i} {
add_connection axi_adrv9009_rx_os.adc_ch_$i axi_adrv9009_rx_os_cpack.adc_ch_$i
}
add_connection axi_adrv9009_rx_os_cpack.if_fifo_wr_overflow axi_adrv9009_rx_os.if_adc_dovf
# dac fifo
@ -129,14 +178,16 @@ add_connection adrv9009_tx_jesd204.link_clk avl_adrv9009_tx_fifo.if_dac_clk
add_connection adrv9009_tx_jesd204.link_reset avl_adrv9009_tx_fifo.if_dac_rst
add_connection axi_adrv9009_tx_upack.if_packed_fifo_rd_en avl_adrv9009_tx_fifo.if_dac_valid
add_connection avl_adrv9009_tx_fifo.if_dac_data axi_adrv9009_tx_upack.if_packed_fifo_rd_data
add_connection avl_adrv9009_tx_fifo.if_dac_dunf axi_adrv9009.if_dac_dunf
add_connection avl_adrv9009_tx_fifo.if_dac_dunf axi_adrv9009_tx.if_dac_dunf
# dac & adc dma
add_instance axi_adrv9009_tx_dma axi_dmac
set_instance_parameter_value axi_adrv9009_tx_dma {ID} {0}
set_instance_parameter_value axi_adrv9009_tx_dma {DMA_DATA_WIDTH_SRC} {128}
set_instance_parameter_value axi_adrv9009_tx_dma {DMA_DATA_WIDTH_DEST} {128}
set_instance_parameter_value axi_adrv9009_tx_dma {DMA_DATA_WIDTH_DEST} [expr $TX_SAMPLE_WIDTH * \
$TX_NUM_OF_CONVERTERS * \
$TX_SAMPLES_PER_CHANNEL]
set_instance_parameter_value axi_adrv9009_tx_dma {DMA_LENGTH_WIDTH} {24}
set_instance_parameter_value axi_adrv9009_tx_dma {DMA_2D_TRANSFER} {0}
set_instance_parameter_value axi_adrv9009_tx_dma {AXI_SLICE_DEST} {0}
@ -160,7 +211,9 @@ add_connection sys_dma_clk.clk_reset axi_adrv9009_tx_dma.m_src_axi_reset
add_instance axi_adrv9009_rx_dma axi_dmac
set_instance_parameter_value axi_adrv9009_rx_dma {ID} {0}
set_instance_parameter_value axi_adrv9009_rx_dma {DMA_DATA_WIDTH_SRC} {64}
set_instance_parameter_value axi_adrv9009_rx_dma {DMA_DATA_WIDTH_SRC} [expr $RX_SAMPLE_WIDTH * \
$RX_NUM_OF_CONVERTERS * \
$RX_SAMPLES_PER_CHANNEL]
set_instance_parameter_value axi_adrv9009_rx_dma {DMA_DATA_WIDTH_DEST} {128}
set_instance_parameter_value axi_adrv9009_rx_dma {DMA_LENGTH_WIDTH} {24}
set_instance_parameter_value axi_adrv9009_rx_dma {DMA_2D_TRANSFER} {0}
@ -183,7 +236,7 @@ add_connection sys_dma_clk.clk_reset axi_adrv9009_rx_dma.m_dest_axi_reset
add_instance axi_adrv9009_rx_os_dma axi_dmac
set_instance_parameter_value axi_adrv9009_rx_os_dma {ID} {0}
set_instance_parameter_value axi_adrv9009_rx_os_dma {DMA_DATA_WIDTH_SRC} {128}
set_instance_parameter_value axi_adrv9009_rx_os_dma {DMA_DATA_WIDTH_SRC} [expr 32*$RX_OS_NUM_OF_LANES]
set_instance_parameter_value axi_adrv9009_rx_os_dma {DMA_DATA_WIDTH_DEST} {128}
set_instance_parameter_value axi_adrv9009_rx_os_dma {DMA_LENGTH_WIDTH} {24}
set_instance_parameter_value axi_adrv9009_rx_os_dma {DMA_2D_TRANSFER} {0}
@ -257,7 +310,9 @@ ad_cpu_interconnect 0x00048000 avl_adxcfg_2.rcfg_s1
ad_cpu_interconnect 0x00049000 avl_adxcfg_3.rcfg_s1
ad_cpu_interconnect 0x0004c000 axi_adrv9009_rx_os_dma.s_axi
ad_cpu_interconnect 0x00050000 axi_adrv9009.s_axi
ad_cpu_interconnect 0x00050000 axi_adrv9009_rx.s_axi
ad_cpu_interconnect 0x00054000 axi_adrv9009_tx.s_axi
ad_cpu_interconnect 0x00058000 axi_adrv9009_rx_os.s_axi
ad_cpu_interconnect 0x00060000 avl_adrv9009_gpio.s1
# dma interconnects