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axi_adrv9009: Split DATAPATH parameter in multiple parameters. Map the parameters in the CONFIG register

main
Adrian Costina 2018-06-28 17:50:57 +03:00
parent 41e717ec2c
commit 7601e386a6
6 changed files with 120 additions and 40 deletions
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32
library/axi_adrv9009/axi_adrv9009.v
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@ -38,8 +38,17 @@
module axi_adrv9009 #( module axi_adrv9009 #(
parameter ID = 0, parameter ID = 0,
parameter ADC_DATAPATH_DISABLE = 0,
parameter ADC_DATAFORMAT_DISABLE = 0,
parameter ADC_DCFILTER_DISABLE = 0,
parameter ADC_IQCORRECTION_DISABLE = 0,
parameter ADC_OS_DATAPATH_DISABLE = 0,
parameter ADC_OS_DATAFORMAT_DISABLE = 0,
parameter ADC_OS_DCFILTER_DISABLE = 0,
parameter ADC_OS_IQCORRECTION_DISABLE = 0,
parameter DAC_DATAPATH_DISABLE = 0, parameter DAC_DATAPATH_DISABLE = 0,
parameter ADC_DATAPATH_DISABLE = 0) ( parameter DAC_DDS_DISABLE = 0,
parameter DAC_IQCORRECTION_DISABLE = 0) (
// receive // receive
@ -134,6 +143,16 @@ module axi_adrv9009 #(
output [ 1:0] s_axi_rresp, output [ 1:0] s_axi_rresp,
input s_axi_rready); input s_axi_rready);
// derived parameters
localparam ADC_DATAFORMAT_DISABLE_INT = (ADC_DATAPATH_DISABLE == 1) ? 1 : ADC_DATAFORMAT_DISABLE;
localparam ADC_DCFILTER_DISABLE_INT = (ADC_DATAPATH_DISABLE == 1) ? 1 : ADC_DCFILTER_DISABLE;
localparam ADC_IQCORRECTION_DISABLE_INT = (ADC_DATAPATH_DISABLE == 1) ? 1 : ADC_IQCORRECTION_DISABLE;
localparam ADC_OS_DATAFORMAT_DISABLE_INT = (ADC_OS_DATAPATH_DISABLE == 1) ? 1 : ADC_OS_DATAFORMAT_DISABLE;
localparam ADC_OS_DCFILTER_DISABLE_INT = (ADC_OS_DATAPATH_DISABLE == 1) ? 1 : ADC_OS_DCFILTER_DISABLE;
localparam ADC_OS_IQCORRECTION_DISABLE_INT = (ADC_OS_DATAPATH_DISABLE == 1) ? 1 : ADC_OS_IQCORRECTION_DISABLE;
localparam DAC_DDS_DISABLE_INT = (DAC_DATAPATH_DISABLE == 1) ? 1 : DAC_DDS_DISABLE;
localparam DAC_IQCORRECTION_DISABLE_INT = (DAC_DATAPATH_DISABLE == 1) ? 1 : DAC_IQCORRECTION_DISABLE;
// internal registers // internal registers
@ -207,7 +226,9 @@ module axi_adrv9009 #(
axi_adrv9009_rx #( axi_adrv9009_rx #(
.ID (ID), .ID (ID),
.DATAPATH_DISABLE (ADC_DATAPATH_DISABLE)) .DATAFORMAT_DISABLE (ADC_DATAFORMAT_DISABLE_INT),
.DCFILTER_DISABLE (ADC_DCFILTER_DISABLE_INT),
.IQCORRECTION_DISABLE (ADC_IQCORRECTION_DISABLE_INT))
i_rx ( i_rx (
.adc_rst (adc_rst), .adc_rst (adc_rst),
.adc_clk (adc_clk), .adc_clk (adc_clk),
@ -240,7 +261,9 @@ module axi_adrv9009 #(
axi_adrv9009_rx_os #( axi_adrv9009_rx_os #(
.ID (ID), .ID (ID),
.DATAPATH_DISABLE (ADC_DATAPATH_DISABLE)) .DATAFORMAT_DISABLE (ADC_DATAFORMAT_DISABLE_INT),
.DCFILTER_DISABLE (ADC_DCFILTER_DISABLE_INT),
.IQCORRECTION_DISABLE (ADC_IQCORRECTION_DISABLE_INT))
i_rx_os ( i_rx_os (
.adc_os_rst (adc_os_rst), .adc_os_rst (adc_os_rst),
.adc_os_clk (adc_os_clk), .adc_os_clk (adc_os_clk),
@ -275,7 +298,8 @@ module axi_adrv9009 #(
axi_adrv9009_tx #( axi_adrv9009_tx #(
.ID (ID), .ID (ID),
.DATAPATH_DISABLE (DAC_DATAPATH_DISABLE)) .DDS_DISABLE (DAC_DDS_DISABLE_INT),
.IQCORRECTION_DISABLE (DAC_IQCORRECTION_DISABLE_INT))
i_tx ( i_tx (
.dac_rst (dac_rst), .dac_rst (dac_rst),
.dac_clk (dac_clk), .dac_clk (dac_clk),

36
library/axi_adrv9009/axi_adrv9009_rx.v
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@ -37,8 +37,10 @@
module axi_adrv9009_rx #( module axi_adrv9009_rx #(
parameter DATAPATH_DISABLE = 0, parameter ID = 0,
parameter ID = 0) ( parameter DATAFORMAT_DISABLE = 0,
parameter DCFILTER_DISABLE = 0,
parameter IQCORRECTION_DISABLE = 0) (
// adc interface // adc interface
@ -75,6 +77,11 @@ module axi_adrv9009_rx #(
output reg [ 31:0] up_rdata, output reg [ 31:0] up_rdata,
output reg up_rack); output reg up_rack);
// configuration settings
localparam CONFIG = (DATAFORMAT_DISABLE * 4) +
(DCFILTER_DISABLE * 2) +
(IQCORRECTION_DISABLE * 1);
// internal registers // internal registers
@ -127,8 +134,10 @@ module axi_adrv9009_rx #(
axi_adrv9009_rx_channel #( axi_adrv9009_rx_channel #(
.Q_OR_I_N (0), .Q_OR_I_N (0),
.COMMON_ID ('h01), .COMMON_ID ('h01),
.CHANNEL_ID (0), .DISABLE (0),
.DATAPATH_DISABLE (DATAPATH_DISABLE), .DATAFORMAT_DISABLE (DATAFORMAT_DISABLE),
.DCFILTER_DISABLE (DCFILTER_DISABLE),
.IQCORRECTION_DISABLE (IQCORRECTION_DISABLE),
.DATA_WIDTH (16)) .DATA_WIDTH (16))
i_rx_channel_0 ( i_rx_channel_0 (
.adc_clk (adc_clk), .adc_clk (adc_clk),
@ -160,7 +169,10 @@ module axi_adrv9009_rx #(
.Q_OR_I_N (1), .Q_OR_I_N (1),
.COMMON_ID ('h01), .COMMON_ID ('h01),
.CHANNEL_ID (1), .CHANNEL_ID (1),
.DATAPATH_DISABLE (DATAPATH_DISABLE), .DISABLE (0),
.DATAFORMAT_DISABLE (DATAFORMAT_DISABLE),
.DCFILTER_DISABLE (DCFILTER_DISABLE),
.IQCORRECTION_DISABLE (IQCORRECTION_DISABLE),
.DATA_WIDTH (16)) .DATA_WIDTH (16))
i_rx_channel_1 ( i_rx_channel_1 (
.adc_clk (adc_clk), .adc_clk (adc_clk),
@ -192,7 +204,10 @@ module axi_adrv9009_rx #(
.Q_OR_I_N (0), .Q_OR_I_N (0),
.COMMON_ID ('h01), .COMMON_ID ('h01),
.CHANNEL_ID (2), .CHANNEL_ID (2),
.DATAPATH_DISABLE (DATAPATH_DISABLE), .DISABLE (0),
.DATAFORMAT_DISABLE (DATAFORMAT_DISABLE),
.DCFILTER_DISABLE (DCFILTER_DISABLE),
.IQCORRECTION_DISABLE (IQCORRECTION_DISABLE),
.DATA_WIDTH (16)) .DATA_WIDTH (16))
i_rx_channel_2 ( i_rx_channel_2 (
.adc_clk (adc_clk), .adc_clk (adc_clk),
@ -224,7 +239,10 @@ module axi_adrv9009_rx #(
.Q_OR_I_N (1), .Q_OR_I_N (1),
.COMMON_ID ('h01), .COMMON_ID ('h01),
.CHANNEL_ID (3), .CHANNEL_ID (3),
.DATAPATH_DISABLE (DATAPATH_DISABLE), .DISABLE (0),
.DATAFORMAT_DISABLE (DATAFORMAT_DISABLE),
.DCFILTER_DISABLE (DCFILTER_DISABLE),
.IQCORRECTION_DISABLE (IQCORRECTION_DISABLE),
.DATA_WIDTH (16)) .DATA_WIDTH (16))
i_rx_channel_3 ( i_rx_channel_3 (
.adc_clk (adc_clk), .adc_clk (adc_clk),
@ -253,9 +271,9 @@ module axi_adrv9009_rx #(
// common processor control // common processor control
up_adc_common #( up_adc_common #(
.COMMON_ID (6'h00),
.ID (ID), .ID (ID),
.CONFIG(0), .COMMON_ID (6'h00),
.CONFIG(CONFIG),
.DRP_DISABLE(1), .DRP_DISABLE(1),
.USERPORTS_DISABLE(1), .USERPORTS_DISABLE(1),
.GPIO_DISABLE(1), .GPIO_DISABLE(1),

17
library/axi_adrv9009/axi_adrv9009_rx_channel.v
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@ -40,7 +40,10 @@ module axi_adrv9009_rx_channel #(
parameter Q_OR_I_N = 0, parameter Q_OR_I_N = 0,
parameter COMMON_ID = 0, parameter COMMON_ID = 0,
parameter CHANNEL_ID = 0, parameter CHANNEL_ID = 0,
parameter DATAPATH_DISABLE = 0, parameter DISABLE = 0,
parameter DATAFORMAT_DISABLE = 0,
parameter DCFILTER_DISABLE = 0,
parameter IQCORRECTION_DISABLE = 0,
parameter DATA_WIDTH = 32) ( parameter DATA_WIDTH = 32) (
// adc interface // adc interface
@ -107,7 +110,7 @@ module axi_adrv9009_rx_channel #(
generate generate
for (n = 0; n < NUM_OF_SAMPLES; n = n + 1) begin: g_datafmt for (n = 0; n < NUM_OF_SAMPLES; n = n + 1) begin: g_datafmt
if (DATAPATH_DISABLE == 1) begin if (DISABLE == 1 || DATAFORMAT_DISABLE == 1) begin
assign adc_dfmt_valid_s[n] = adc_valid_in; assign adc_dfmt_valid_s[n] = adc_valid_in;
assign adc_dfmt_data_s[((16*n)+15):(16*n)] = adc_data_in[((16*n)+15):(16*n)]; assign adc_dfmt_data_s[((16*n)+15):(16*n)] = adc_data_in[((16*n)+15):(16*n)];
end else begin end else begin
@ -126,7 +129,7 @@ module axi_adrv9009_rx_channel #(
generate generate
for (n = 0; n < NUM_OF_SAMPLES; n = n + 1) begin: g_dcfilter for (n = 0; n < NUM_OF_SAMPLES; n = n + 1) begin: g_dcfilter
if (DATAPATH_DISABLE == 1) begin if (DISABLE == 1 || DCFILTER_DISABLE == 1) begin
assign adc_dcfilter_valid_s[n] = adc_dfmt_valid_s[n]; assign adc_dcfilter_valid_s[n] = adc_dfmt_valid_s[n];
assign adc_dcfilter_data_s[((16*n)+15):(16*n)] = adc_dfmt_data_s[((16*n)+15):(16*n)]; assign adc_dcfilter_data_s[((16*n)+15):(16*n)] = adc_dfmt_data_s[((16*n)+15):(16*n)];
end else begin end else begin
@ -148,7 +151,7 @@ module axi_adrv9009_rx_channel #(
generate generate
for (n = 0; n < NUM_OF_SAMPLES; n = n + 1) begin: g_iqcor for (n = 0; n < NUM_OF_SAMPLES; n = n + 1) begin: g_iqcor
if (DATAPATH_DISABLE == 1) begin if (DISABLE == 1 || IQCORRECTION_DISABLE == 1) begin
assign adc_valid_out_s[n] = adc_dcfilter_valid_s[n]; assign adc_valid_out_s[n] = adc_dcfilter_valid_s[n];
assign adc_data_out[((16*n)+15):(16*n)] = adc_dcfilter_data_s[((16*n)+15):(16*n)]; assign adc_data_out[((16*n)+15):(16*n)] = adc_dcfilter_data_s[((16*n)+15):(16*n)];
end else begin end else begin
@ -170,9 +173,9 @@ module axi_adrv9009_rx_channel #(
.COMMON_ID (COMMON_ID), .COMMON_ID (COMMON_ID),
.CHANNEL_ID (CHANNEL_ID), .CHANNEL_ID (CHANNEL_ID),
.USERPORTS_DISABLE(1), .USERPORTS_DISABLE(1),
.DATAFORMAT_DISABLE(DATAPATH_DISABLE), .DATAFORMAT_DISABLE(DATAFORMAT_DISABLE),
.DCFILTER_DISABLE(DATAPATH_DISABLE), .DCFILTER_DISABLE(DCFILTER_DISABLE),
.IQCORRECTION_DISABLE(DATAPATH_DISABLE)) .IQCORRECTION_DISABLE(IQCORRECTION_DISABLE))
i_up_adc_channel ( i_up_adc_channel (
.adc_clk (adc_clk), .adc_clk (adc_clk),
.adc_rst (adc_rst), .adc_rst (adc_rst),

36
library/axi_adrv9009/axi_adrv9009_rx_os.v
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@ -37,8 +37,10 @@
module axi_adrv9009_rx_os #( module axi_adrv9009_rx_os #(
parameter DATAPATH_DISABLE = 0, parameter ID = 0,
parameter ID = 0) ( parameter DATAFORMAT_DISABLE = 0,
parameter DCFILTER_DISABLE = 0,
parameter IQCORRECTION_DISABLE = 0) (
// adc interface // adc interface
@ -77,6 +79,9 @@ module axi_adrv9009_rx_os #(
output reg [ 31:0] up_rdata, output reg [ 31:0] up_rdata,
output reg up_rack); output reg up_rack);
localparam CONFIG = (DATAFORMAT_DISABLE * 4) +
(DCFILTER_DISABLE * 2) +
(IQCORRECTION_DISABLE * 1);
// internal registers // internal registers
@ -123,7 +128,10 @@ module axi_adrv9009_rx_os #(
.Q_OR_I_N (0), .Q_OR_I_N (0),
.COMMON_ID ('h21), .COMMON_ID ('h21),
.CHANNEL_ID (0), .CHANNEL_ID (0),
.DATAPATH_DISABLE (DATAPATH_DISABLE), .DISABLE (0),
.DATAFORMAT_DISABLE (DATAFORMAT_DISABLE),
.DCFILTER_DISABLE (DCFILTER_DISABLE),
.IQCORRECTION_DISABLE (IQCORRECTION_DISABLE),
.DATA_WIDTH (32)) .DATA_WIDTH (32))
i_rx_os_channel_0 ( i_rx_os_channel_0 (
.adc_clk (adc_os_clk), .adc_clk (adc_os_clk),
@ -155,7 +163,10 @@ module axi_adrv9009_rx_os #(
.Q_OR_I_N (1), .Q_OR_I_N (1),
.COMMON_ID ('h21), .COMMON_ID ('h21),
.CHANNEL_ID (1), .CHANNEL_ID (1),
.DATAPATH_DISABLE (DATAPATH_DISABLE), .DISABLE (0),
.DATAFORMAT_DISABLE (DATAFORMAT_DISABLE),
.DCFILTER_DISABLE (DCFILTER_DISABLE),
.IQCORRECTION_DISABLE (IQCORRECTION_DISABLE),
.DATA_WIDTH (32)) .DATA_WIDTH (32))
i_rx_os_channel_1 ( i_rx_os_channel_1 (
.adc_clk (adc_os_clk), .adc_clk (adc_os_clk),
@ -185,7 +196,10 @@ module axi_adrv9009_rx_os #(
.Q_OR_I_N (2), .Q_OR_I_N (2),
.COMMON_ID ('h21), .COMMON_ID ('h21),
.CHANNEL_ID (2), .CHANNEL_ID (2),
.DATAPATH_DISABLE (DATAPATH_DISABLE), .DISABLE (0),
.DATAFORMAT_DISABLE (DATAFORMAT_DISABLE),
.DCFILTER_DISABLE (DCFILTER_DISABLE),
.IQCORRECTION_DISABLE (IQCORRECTION_DISABLE),
.DATA_WIDTH (32)) .DATA_WIDTH (32))
i_rx_os_channel_2 ( i_rx_os_channel_2 (
.adc_clk (adc_os_clk), .adc_clk (adc_os_clk),
@ -215,7 +229,10 @@ module axi_adrv9009_rx_os #(
.Q_OR_I_N (3), .Q_OR_I_N (3),
.COMMON_ID ('h21), .COMMON_ID ('h21),
.CHANNEL_ID (3), .CHANNEL_ID (3),
.DATAPATH_DISABLE (DATAPATH_DISABLE), .DISABLE (0),
.DATAFORMAT_DISABLE (DATAFORMAT_DISABLE),
.DCFILTER_DISABLE (DCFILTER_DISABLE),
.IQCORRECTION_DISABLE (IQCORRECTION_DISABLE),
.DATA_WIDTH (32)) .DATA_WIDTH (32))
i_rx_os_channel_3 ( i_rx_os_channel_3 (
.adc_clk (adc_os_clk), .adc_clk (adc_os_clk),
@ -244,8 +261,13 @@ module axi_adrv9009_rx_os #(
// common processor control // common processor control
up_adc_common #( up_adc_common #(
.ID (ID),
.COMMON_ID ('h20), .COMMON_ID ('h20),
.ID (ID)) .CONFIG (CONFIG),
.DRP_DISABLE (1),
.USERPORTS_DISABLE (1),
.GPIO_DISABLE (1),
.START_CODE_DISABLE (1))
i_up_adc_common ( i_up_adc_common (
.mmcm_rst (), .mmcm_rst (),
.adc_clk (adc_os_clk), .adc_clk (adc_os_clk),

27
library/axi_adrv9009/axi_adrv9009_tx.v
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@ -37,8 +37,9 @@
module axi_adrv9009_tx #( module axi_adrv9009_tx #(
parameter DATAPATH_DISABLE = 0, parameter ID = 0,
parameter ID = 0) ( parameter DDS_DISABLE = 0,
parameter IQCORRECTION_DISABLE = 0) (
// dac interface // dac interface
@ -80,8 +81,10 @@ module axi_adrv9009_tx #(
output reg [ 31:0] up_rdata, output reg [ 31:0] up_rdata,
output reg up_rack); output reg up_rack);
// configuration settings
localparam CONFIG = (DDS_DISABLE * 64) +
(IQCORRECTION_DISABLE * 1);
// internal registers // internal registers
@ -129,7 +132,9 @@ module axi_adrv9009_tx #(
axi_adrv9009_tx_channel #( axi_adrv9009_tx_channel #(
.CHANNEL_ID (0), .CHANNEL_ID (0),
.Q_OR_I_N (0), .Q_OR_I_N (0),
.DATAPATH_DISABLE (DATAPATH_DISABLE)) .DISABLE (0),
.DDS_DISABLE (DDS_DISABLE),
.IQCORRECTION_DISABLE (IQCORRECTION_DISABLE))
i_tx_channel_0 ( i_tx_channel_0 (
.dac_clk (dac_clk), .dac_clk (dac_clk),
.dac_rst (dac_rst), .dac_rst (dac_rst),
@ -158,7 +163,9 @@ module axi_adrv9009_tx #(
axi_adrv9009_tx_channel #( axi_adrv9009_tx_channel #(
.CHANNEL_ID (1), .CHANNEL_ID (1),
.Q_OR_I_N (1), .Q_OR_I_N (1),
.DATAPATH_DISABLE (DATAPATH_DISABLE)) .DISABLE (0),
.DDS_DISABLE (DDS_DISABLE),
.IQCORRECTION_DISABLE (IQCORRECTION_DISABLE))
i_tx_channel_1 ( i_tx_channel_1 (
.dac_clk (dac_clk), .dac_clk (dac_clk),
.dac_rst (dac_rst), .dac_rst (dac_rst),
@ -187,7 +194,9 @@ module axi_adrv9009_tx #(
axi_adrv9009_tx_channel #( axi_adrv9009_tx_channel #(
.CHANNEL_ID (2), .CHANNEL_ID (2),
.Q_OR_I_N (0), .Q_OR_I_N (0),
.DATAPATH_DISABLE (DATAPATH_DISABLE)) .DISABLE (0),
.DDS_DISABLE (DDS_DISABLE),
.IQCORRECTION_DISABLE (IQCORRECTION_DISABLE))
i_tx_channel_2 ( i_tx_channel_2 (
.dac_clk (dac_clk), .dac_clk (dac_clk),
.dac_rst (dac_rst), .dac_rst (dac_rst),
@ -216,7 +225,9 @@ module axi_adrv9009_tx #(
axi_adrv9009_tx_channel #( axi_adrv9009_tx_channel #(
.CHANNEL_ID (3), .CHANNEL_ID (3),
.Q_OR_I_N (1), .Q_OR_I_N (1),
.DATAPATH_DISABLE (DATAPATH_DISABLE)) .DISABLE (0),
.DDS_DISABLE (DDS_DISABLE),
.IQCORRECTION_DISABLE (IQCORRECTION_DISABLE))
i_tx_channel_3 ( i_tx_channel_3 (
.dac_clk (dac_clk), .dac_clk (dac_clk),
.dac_rst (dac_rst), .dac_rst (dac_rst),
@ -242,7 +253,7 @@ module axi_adrv9009_tx #(
up_dac_common #( up_dac_common #(
.ID (ID), .ID (ID),
.CONFIG(0), .CONFIG(CONFIG),
.CLK_EDGE_SEL(0), .CLK_EDGE_SEL(0),
.COMMON_ID(6'h10), .COMMON_ID(6'h10),
.DRP_DISABLE(1), .DRP_DISABLE(1),

12
library/axi_adrv9009/axi_adrv9009_tx_channel.v
View File

@ -39,7 +39,9 @@ module axi_adrv9009_tx_channel #(
parameter CHANNEL_ID = 32'h0, parameter CHANNEL_ID = 32'h0,
parameter Q_OR_I_N = 0, parameter Q_OR_I_N = 0,
parameter DATAPATH_DISABLE = 0) ( parameter DISABLE = 0,
parameter DDS_DISABLE = 0,
parameter IQCORRECTION_DISABLE = 0) (
// dac interface // dac interface
@ -101,7 +103,7 @@ module axi_adrv9009_tx_channel #(
// dac iq correction // dac iq correction
generate generate
if (DATAPATH_DISABLE == 1) begin if (DISABLE == 1 || IQCORRECTION_DISABLE == 1) begin
assign dac_data_out = dac_data_iq_out; assign dac_data_out = dac_data_iq_out;
@ -174,7 +176,7 @@ module axi_adrv9009_tx_channel #(
// dds // dds
generate generate
if (DATAPATH_DISABLE == 1) begin if (DISABLE == 1 || DDS_DISABLE == 1) begin
assign dac_dds_data_0_s = 16'd0; assign dac_dds_data_0_s = 16'd0;
assign dac_dds_data_1_s = 16'd0; assign dac_dds_data_1_s = 16'd0;
@ -207,9 +209,9 @@ module axi_adrv9009_tx_channel #(
up_dac_channel #( up_dac_channel #(
.COMMON_ID(6'h11), .COMMON_ID(6'h11),
.CHANNEL_ID (CHANNEL_ID), .CHANNEL_ID (CHANNEL_ID),
.DDS_DISABLE(DATAPATH_DISABLE), .DDS_DISABLE(DDS_DISABLE),
.USERPORTS_DISABLE(1), .USERPORTS_DISABLE(1),
.IQCORRECTION_DISABLE(DATAPATH_DISABLE)) .IQCORRECTION_DISABLE(IQCORRECTION_DISABLE))
i_up_dac_channel ( i_up_dac_channel (
.dac_clk (dac_clk), .dac_clk (dac_clk),
.dac_rst (dac_rst), .dac_rst (dac_rst),