axi_logic_analyzer: Add missing reset wire declaration

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
main
Lars-Peter Clausen 2017-04-11 12:34:01 +02:00
parent b05505a1c3
commit 77399ec7aa
1 changed files with 2 additions and 0 deletions

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@ -109,6 +109,8 @@ module axi_logic_analyzer (
wire up_rreq;
wire [13:0] up_raddr;
wire reset;
wire [31:0] divider_counter_la;
wire [31:0] divider_counter_pg;