diff --git a/projects/pmods/ad7175_zed/system_bd.tcl b/projects/pmods/ad7175_zed/system_bd.tcl
index 84e3ebf9f..faf4fa3e3 100644
--- a/projects/pmods/ad7175_zed/system_bd.tcl
+++ b/projects/pmods/ad7175_zed/system_bd.tcl
@@ -1,11 +1,11 @@
 
 source $ad_hdl_dir/projects/common/zed/zed_system_bd.tcl
-set_property -dict [list CONFIG.PCW_GPIO_EMIO_GPIO_IO {32}] $sys_ps7
+set_property -dict [list CONFIG.PCW_GPIO_EMIO_GPIO_IO {33}] $sys_ps7
 set_property -dict [list CONFIG.NUM_MI {9}] $axi_cpu_interconnect
 
-set_property LEFT 31 [get_bd_ports GPIO_I]
-set_property LEFT 31 [get_bd_ports GPIO_O]
-set_property LEFT 31 [get_bd_ports GPIO_T]
+set_property LEFT 32 [get_bd_ports GPIO_I]
+set_property LEFT 32 [get_bd_ports GPIO_O]
+set_property LEFT 32 [get_bd_ports GPIO_T]
 
 set adc_sdo_i    [create_bd_port -dir I adc_sdo_i]
 set adc_sdi_o    [create_bd_port -dir O adc_sdi_o]
@@ -94,4 +94,4 @@ connect_bd_net -net sys_100m_resetn   [get_bd_pins axi_ad7175_dma_interconnect/S
 create_bd_addr_seg -range 0x00010000 -offset 0x44A00000 $sys_addr_cntrl_space [get_bd_addr_segs axi_ad7175/s_axi/axi_lite]      SEG_data_ad7175_core
 create_bd_addr_seg -range 0x00010000 -offset 0x44A30000 $sys_addr_cntrl_space [get_bd_addr_segs axi_ad7175_dma/s_axi/axi_lite]  SEG_data_ad7175_dma
 
-create_bd_addr_seg -range $sys_mem_size -offset 0x00000000 [get_bd_addr_spaces axi_ad7175_dma/m_dest_axi]  [get_bd_addr_segs sys_ps7/S_AXI_HP2/HP2_DDR_LOWOCM] SEG_sys_ps7_hp2_ddr_lowocm
\ No newline at end of file
+create_bd_addr_seg -range $sys_mem_size -offset 0x00000000 [get_bd_addr_spaces axi_ad7175_dma/m_dest_axi]  [get_bd_addr_segs sys_ps7/S_AXI_HP2/HP2_DDR_LOWOCM] SEG_sys_ps7_hp2_ddr_lowocm
diff --git a/projects/pmods/ad7175_zed/system_constr.xdc b/projects/pmods/ad7175_zed/system_constr.xdc
index 664e7216e..b61fe8b9c 100644
--- a/projects/pmods/ad7175_zed/system_constr.xdc
+++ b/projects/pmods/ad7175_zed/system_constr.xdc
@@ -1,7 +1,7 @@
 
 # PMOD JA
 
-#set_property  -dict {PACKAGE_PIN Y11   IOSTANDARD LVCMOS33} [get_port gain_o];
+set_property  -dict {PACKAGE_PIN Y11   IOSTANDARD LVCMOS33} [get_port gain_o];
 set_property  -dict {PACKAGE_PIN AA11  IOSTANDARD LVCMOS33} [get_ports led_clk_o];
 #set_property  -dict {PACKAGE_PIN Y10   IOSTANDARD LVCMOS33} [get_ports ad_sync_nc];
 #set_property  -dict {PACKAGE_PIN AA9   IOSTANDARD LVCMOS33} [get_ports ad_clkio_nc];
diff --git a/projects/pmods/ad7175_zed/system_top.v b/projects/pmods/ad7175_zed/system_top.v
index 24e76022d..7a84212d3 100644
--- a/projects/pmods/ad7175_zed/system_top.v
+++ b/projects/pmods/ad7175_zed/system_top.v
@@ -90,6 +90,7 @@ module system_top (
   adc_cs_o,
   adc_sclk_o,
   led_clk_o,
+  gain_o,
   
   otg_vbusoc);
 
@@ -138,19 +139,20 @@ module system_top (
   inout   [ 1:0]  iic_mux_scl;
   inout   [ 1:0]  iic_mux_sda;
   
-  input 			adc_sdo_i;
-  output 			adc_sdi_o;
-  output 			adc_cs_o;
-  output 			adc_sclk_o;
-  output            led_clk_o;
+  input           adc_sdo_i;
+  output          adc_sdi_o;
+  output          adc_cs_o;
+  output          adc_sclk_o;
+  output          led_clk_o;
+  output          gain_o;
 
   input           otg_vbusoc;
 
   // internal signals
 
-  wire    [31:0]  gpio_i;
-  wire    [31:0]  gpio_o;
-  wire    [31:0]  gpio_t;
+  wire    [32:0]  gpio_i;
+  wire    [32:0]  gpio_o;
+  wire    [32:0]  gpio_t;
   wire    [ 1:0]  iic_mux_scl_i_s;
   wire    [ 1:0]  iic_mux_scl_o_s;
   wire            iic_mux_scl_t_s;
@@ -176,6 +178,8 @@ module system_top (
   end
   endgenerate
 
+  assign gain_o = gpio_o[32];
+
   IOBUF i_iic_mux_scl_0 (.I(iic_mux_scl_o_s[0]), .O(iic_mux_scl_i_s[0]), .T(iic_mux_scl_t_s), .IO(iic_mux_scl[0]));
   IOBUF i_iic_mux_scl_1 (.I(iic_mux_scl_o_s[1]), .O(iic_mux_scl_i_s[1]), .T(iic_mux_scl_t_s), .IO(iic_mux_scl[1]));
   IOBUF i_iic_mux_sda_0 (.I(iic_mux_sda_o_s[0]), .O(iic_mux_sda_i_s[0]), .T(iic_mux_sda_t_s), .IO(iic_mux_sda[0]));
@@ -224,16 +228,16 @@ module system_top (
     .iic_mux_sda_I (iic_mux_sda_i_s),
     .iic_mux_sda_O (iic_mux_sda_o_s),
     .iic_mux_sda_T (iic_mux_sda_t_s),
-	.adc_sdo_i (adc_sdo_i),
+    .adc_sdo_i (adc_sdo_i),
     .adc_sdi_o (adc_sdi_o),
     .adc_cs_o (adc_cs_o),
     .adc_sclk_o (adc_sclk_o),
-	.led_clk_o (led_clk_o),
-	.dma_data ({adc_data_3, adc_data_2, adc_data_1, adc_data_0}),
-	.adc_data_3(adc_data_3),
-	.adc_data_2(adc_data_2),
-	.adc_data_1(adc_data_1),
-	.adc_data_0(adc_data_0),
+    .led_clk_o (led_clk_o),
+    .dma_data ({adc_data_3, adc_data_2, adc_data_1, adc_data_0}),
+    .adc_data_3(adc_data_3),
+    .adc_data_2(adc_data_2),
+    .adc_data_1(adc_data_1),
+    .adc_data_0(adc_data_0),
     .otg_vbusoc (otg_vbusoc),
     .spdif (spdif));