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pmod_ad7175: Connect gain control pin 

Connect the gain control pin to GPIO32 of the ZYNQ.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
main
Lars-Peter Clausen 2014-11-03 14:53:46 +01:00
parent 4eea04cc9d
commit 7ad9340992
3 changed files with 25 additions and 21 deletions
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8
projects/pmods/ad7175_zed/system_bd.tcl
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@ -1,11 +1,11 @@
source $ad_hdl_dir/projects/common/zed/zed_system_bd.tcl source $ad_hdl_dir/projects/common/zed/zed_system_bd.tcl
set_property -dict [list CONFIG.PCW_GPIO_EMIO_GPIO_IO {32}] $sys_ps7 set_property -dict [list CONFIG.PCW_GPIO_EMIO_GPIO_IO {33}] $sys_ps7
set_property -dict [list CONFIG.NUM_MI {9}] $axi_cpu_interconnect set_property -dict [list CONFIG.NUM_MI {9}] $axi_cpu_interconnect
set_property LEFT 31 [get_bd_ports GPIO_I] set_property LEFT 32 [get_bd_ports GPIO_I]
set_property LEFT 31 [get_bd_ports GPIO_O] set_property LEFT 32 [get_bd_ports GPIO_O]
set_property LEFT 31 [get_bd_ports GPIO_T] set_property LEFT 32 [get_bd_ports GPIO_T]
set adc_sdo_i [create_bd_port -dir I adc_sdo_i] set adc_sdo_i [create_bd_port -dir I adc_sdo_i]
set adc_sdi_o [create_bd_port -dir O adc_sdi_o] set adc_sdi_o [create_bd_port -dir O adc_sdi_o]

2
projects/pmods/ad7175_zed/system_constr.xdc
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@ -1,7 +1,7 @@
# PMOD JA # PMOD JA
#set_property -dict {PACKAGE_PIN Y11 IOSTANDARD LVCMOS33} [get_port gain_o]; set_property -dict {PACKAGE_PIN Y11 IOSTANDARD LVCMOS33} [get_port gain_o];
set_property -dict {PACKAGE_PIN AA11 IOSTANDARD LVCMOS33} [get_ports led_clk_o]; set_property -dict {PACKAGE_PIN AA11 IOSTANDARD LVCMOS33} [get_ports led_clk_o];
#set_property -dict {PACKAGE_PIN Y10 IOSTANDARD LVCMOS33} [get_ports ad_sync_nc]; #set_property -dict {PACKAGE_PIN Y10 IOSTANDARD LVCMOS33} [get_ports ad_sync_nc];
#set_property -dict {PACKAGE_PIN AA9 IOSTANDARD LVCMOS33} [get_ports ad_clkio_nc]; #set_property -dict {PACKAGE_PIN AA9 IOSTANDARD LVCMOS33} [get_ports ad_clkio_nc];

10
projects/pmods/ad7175_zed/system_top.v
View File

@ -90,6 +90,7 @@ module system_top (
adc_cs_o, adc_cs_o,
adc_sclk_o, adc_sclk_o,
led_clk_o, led_clk_o,
gain_o,
otg_vbusoc); otg_vbusoc);
@ -143,14 +144,15 @@ module system_top (
output adc_cs_o; output adc_cs_o;
output adc_sclk_o; output adc_sclk_o;
output led_clk_o; output led_clk_o;
output gain_o;
input otg_vbusoc; input otg_vbusoc;
// internal signals // internal signals
wire [31:0] gpio_i; wire [32:0] gpio_i;
wire [31:0] gpio_o; wire [32:0] gpio_o;
wire [31:0] gpio_t; wire [32:0] gpio_t;
wire [ 1:0] iic_mux_scl_i_s; wire [ 1:0] iic_mux_scl_i_s;
wire [ 1:0] iic_mux_scl_o_s; wire [ 1:0] iic_mux_scl_o_s;
wire iic_mux_scl_t_s; wire iic_mux_scl_t_s;
@ -176,6 +178,8 @@ module system_top (
end end
endgenerate endgenerate
assign gain_o = gpio_o[32];
IOBUF i_iic_mux_scl_0 (.I(iic_mux_scl_o_s[0]), .O(iic_mux_scl_i_s[0]), .T(iic_mux_scl_t_s), .IO(iic_mux_scl[0])); IOBUF i_iic_mux_scl_0 (.I(iic_mux_scl_o_s[0]), .O(iic_mux_scl_i_s[0]), .T(iic_mux_scl_t_s), .IO(iic_mux_scl[0]));
IOBUF i_iic_mux_scl_1 (.I(iic_mux_scl_o_s[1]), .O(iic_mux_scl_i_s[1]), .T(iic_mux_scl_t_s), .IO(iic_mux_scl[1])); IOBUF i_iic_mux_scl_1 (.I(iic_mux_scl_o_s[1]), .O(iic_mux_scl_i_s[1]), .T(iic_mux_scl_t_s), .IO(iic_mux_scl[1]));
IOBUF i_iic_mux_sda_0 (.I(iic_mux_sda_o_s[0]), .O(iic_mux_sda_i_s[0]), .T(iic_mux_sda_t_s), .IO(iic_mux_sda[0])); IOBUF i_iic_mux_sda_0 (.I(iic_mux_sda_o_s[0]), .O(iic_mux_sda_i_s[0]), .T(iic_mux_sda_t_s), .IO(iic_mux_sda[0]));