From 7b280b3bbfb4a28959b9bf6a4f6ddfa083fc3671 Mon Sep 17 00:00:00 2001 From: Rejeesh Kutty Date: Tue, 26 Aug 2014 12:20:20 -0400 Subject: [PATCH] fmcomms6: zc706 build-only version --- projects/common/xilinx/sys_wfifo.tcl | 67 ++++ projects/fmcomms6/common/fmcomms6_bd.tcl | 403 ++++++++++----------- projects/fmcomms6/common/fmcomms6_spi.v | 109 ++++++ projects/fmcomms6/zc706/system_bd.tcl | 2 +- projects/fmcomms6/zc706/system_constr.xdc | 132 +++---- projects/fmcomms6/zc706/system_project.tcl | 8 +- projects/fmcomms6/zc706/system_top.v | 150 +++----- 7 files changed, 473 insertions(+), 398 deletions(-) create mode 100644 projects/common/xilinx/sys_wfifo.tcl create mode 100644 projects/fmcomms6/common/fmcomms6_spi.v diff --git a/projects/common/xilinx/sys_wfifo.tcl b/projects/common/xilinx/sys_wfifo.tcl new file mode 100644 index 000000000..e2285ff6c --- /dev/null +++ b/projects/common/xilinx/sys_wfifo.tcl @@ -0,0 +1,67 @@ + +# fifo and controller (write side) + +proc p_sys_wfifo {p_name m_name m_width s_width} { + + global ad_hdl_dir + + set p_instance [get_bd_cells $p_name] + set c_instance [current_bd_instance .] + + current_bd_instance $p_instance + + set m_instance [create_bd_cell -type hier $m_name] + current_bd_instance $m_instance + + create_bd_pin -dir I rstn + + create_bd_pin -dir I -type clk m_clk + create_bd_pin -dir I m_wr + create_bd_pin -dir O m_wovf + create_bd_pin -dir I -from [expr ($m_width-1)] -to 0 m_wdata + + create_bd_pin -dir I -type clk s_clk + create_bd_pin -dir O s_wr + create_bd_pin -dir I s_wovf + create_bd_pin -dir O -from [expr ($s_width-1)] -to 0 s_wdata + + set wfifo_ctl [create_bd_cell -type ip -vlnv analog.com:user:util_wfifo:1.0 wfifo_ctl] + set_property -dict [list CONFIG.M_DATA_WIDTH $m_width] $wfifo_ctl + set_property -dict [list CONFIG.S_DATA_WIDTH $s_width] $wfifo_ctl + + set wfifo_mem [create_bd_cell -type ip -vlnv xilinx.com:ip:fifo_generator:11.0 wfifo_mem] + set_property -dict [list CONFIG.INTERFACE_TYPE {Native}] $wfifo_mem + set_property -dict [list CONFIG.Fifo_Implementation {Independent_Clocks_Block_RAM}] $wfifo_mem + set_property -dict [list CONFIG.Input_Data_Width $m_width] $wfifo_mem + set_property -dict [list CONFIG.Input_Depth {64}] $wfifo_mem + set_property -dict [list CONFIG.Output_Data_Width $s_width] $wfifo_mem + set_property -dict [list CONFIG.Overflow_Flag {true}] $wfifo_mem + + connect_bd_net -net rstn [get_bd_pins rstn] + connect_bd_net -net m_clk [get_bd_pins m_clk] + connect_bd_net -net s_clk [get_bd_pins s_clk] + connect_bd_net -net rstn [get_bd_pins wfifo_ctl/rstn] + connect_bd_net -net m_clk [get_bd_pins wfifo_ctl/m_clk] + connect_bd_net -net s_clk [get_bd_pins wfifo_ctl/s_clk] + connect_bd_net -net m_clk [get_bd_pins wfifo_mem/wr_clk] + connect_bd_net -net s_clk [get_bd_pins wfifo_mem/rd_clk] + + connect_bd_net -net m_wr [get_bd_pins m_wr] [get_bd_pins wfifo_ctl/m_wr] + connect_bd_net -net m_wdata [get_bd_pins m_wdata] [get_bd_pins wfifo_ctl/m_wdata] + connect_bd_net -net m_wovf [get_bd_pins m_wovf] [get_bd_pins wfifo_ctl/m_wovf] + connect_bd_net -net s_wr [get_bd_pins s_wr] [get_bd_pins wfifo_ctl/s_wr] + connect_bd_net -net s_wdata [get_bd_pins s_wdata] [get_bd_pins wfifo_ctl/s_wdata] + connect_bd_net -net s_wovf [get_bd_pins s_wovf] [get_bd_pins wfifo_ctl/s_wovf] + + connect_bd_net -net wfifo_ctl_fifo_rst [get_bd_pins wfifo_ctl/fifo_rst] [get_bd_pins wfifo_mem/rst] + connect_bd_net -net wfifo_ctl_fifo_wr [get_bd_pins wfifo_ctl/fifo_wr] [get_bd_pins wfifo_mem/wr_en] + connect_bd_net -net wfifo_ctl_fifo_wdata [get_bd_pins wfifo_ctl/fifo_wdata] [get_bd_pins wfifo_mem/din] + connect_bd_net -net wfifo_ctl_fifo_wfull [get_bd_pins wfifo_ctl/fifo_wfull] [get_bd_pins wfifo_mem/full] + connect_bd_net -net wfifo_ctl_fifo_wovf [get_bd_pins wfifo_ctl/fifo_wovf] [get_bd_pins wfifo_mem/overflow] + connect_bd_net -net wfifo_ctl_fifo_rd [get_bd_pins wfifo_ctl/fifo_rd] [get_bd_pins wfifo_mem/rd_en] + connect_bd_net -net wfifo_ctl_fifo_rdata [get_bd_pins wfifo_ctl/fifo_rdata] [get_bd_pins wfifo_mem/dout] + connect_bd_net -net wfifo_ctl_fifo_rempty [get_bd_pins wfifo_ctl/fifo_rempty] [get_bd_pins wfifo_mem/empty] + + current_bd_instance $c_instance +} + diff --git a/projects/fmcomms6/common/fmcomms6_bd.tcl b/projects/fmcomms6/common/fmcomms6_bd.tcl index 9e3cc2900..56a0ece8c 100644 --- a/projects/fmcomms6/common/fmcomms6_bd.tcl +++ b/projects/fmcomms6/common/fmcomms6_bd.tcl @@ -1,271 +1,256 @@ - source $ad_hdl_dir/projects/common/xilinx/sys_wfifo.tcl +source $ad_hdl_dir/projects/common/xilinx/sys_wfifo.tcl - # dac interface +# adc interface - set dac_clk_in_p [create_bd_port -dir I dac_clk_in_p] - set dac_clk_in_n [create_bd_port -dir I dac_clk_in_n] - set dac_clk_out_p [create_bd_port -dir O dac_clk_out_p] - set dac_clk_out_n [create_bd_port -dir O dac_clk_out_n] - set dac_frame_out_p [create_bd_port -dir O dac_frame_out_p] - set dac_frame_out_n [create_bd_port -dir O dac_frame_out_n] - set dac_data_out_p [create_bd_port -dir O -from 15 -to 0 dac_data_out_p] - set dac_data_out_n [create_bd_port -dir O -from 15 -to 0 dac_data_out_n] - - # adc interface - - set adc_clk_in_p [create_bd_port -dir I adc_clk_in_p] - set adc_clk_in_n [create_bd_port -dir I adc_clk_in_n] - set adc_or_in_p [create_bd_port -dir I adc_or_in_p] - set adc_or_in_n [create_bd_port -dir I adc_or_in_n] - set adc_data_in_p [create_bd_port -dir I -from 13 -to 0 adc_data_in_p] - set adc_data_in_n [create_bd_port -dir I -from 13 -to 0 adc_data_in_n] - - # reference clock - - set ref_clk [create_bd_port -dir O ref_clk] - - # dma interface - - set dac_clk [create_bd_port -dir O dac_clk] - set dac_valid_0 [create_bd_port -dir O dac_valid_0] - set dac_enable_0 [create_bd_port -dir O dac_enable_0] - set dac_ddata_0 [create_bd_port -dir I -from 63 -to 0 dac_ddata_0] - set dac_valid_1 [create_bd_port -dir O dac_valid_1] - set dac_enable_1 [create_bd_port -dir O dac_enable_1] - set dac_ddata_1 [create_bd_port -dir I -from 63 -to 0 dac_ddata_1] - set dac_dma_rd [create_bd_port -dir I dac_dma_rd] - set dac_dma_rdata [create_bd_port -dir O -from 63 -to 0 dac_dma_rdata] - - set adc_clk [create_bd_port -dir O adc_clk] - set adc_valid_0 [create_bd_port -dir O adc_valid_0] - set adc_enable_0 [create_bd_port -dir O adc_enable_0] - set adc_data_0 [create_bd_port -dir O -from 15 -to 0 adc_data_0] - set adc_valid_1 [create_bd_port -dir O adc_valid_1] - set adc_enable_1 [create_bd_port -dir O adc_enable_1] - set adc_data_1 [create_bd_port -dir O -from 15 -to 0 adc_data_1] - set adc_dma_wr [create_bd_port -dir I adc_dma_wr] - set adc_dma_sync [create_bd_port -dir I adc_dma_sync] - set adc_dma_wdata [create_bd_port -dir I -from 31 -to 0 adc_dma_wdata] - - # dac peripherals - - set axi_ad9122 [create_bd_cell -type ip -vlnv analog.com:user:axi_ad9122:1.0 axi_ad9122] - - set axi_ad9122_dma [create_bd_cell -type ip -vlnv analog.com:user:axi_dmac:1.0 axi_ad9122_dma] - set_property -dict [list CONFIG.C_DMA_TYPE_SRC {0}] $axi_ad9122_dma - set_property -dict [list CONFIG.C_DMA_TYPE_DEST {2}] $axi_ad9122_dma - set_property -dict [list CONFIG.C_2D_TRANSFER {0}] $axi_ad9122_dma - set_property -dict [list CONFIG.C_CYCLIC {1}] $axi_ad9122_dma - set_property -dict [list CONFIG.C_DMA_DATA_WIDTH_DEST {64}] $axi_ad9122_dma +set adc_clk_in_p [create_bd_port -dir I adc_clk_in_p] +set adc_clk_in_n [create_bd_port -dir I adc_clk_in_n] +set adc_or_in_p [create_bd_port -dir I adc_or_in_p] +set adc_or_in_n [create_bd_port -dir I adc_or_in_n] +set adc_data_in_p [create_bd_port -dir I -from 15 -to 0 adc_data_in_p] +set adc_data_in_n [create_bd_port -dir I -from 15 -to 0 adc_data_in_n] if {$sys_zynq == 1} { - set axi_ad9122_dma_interconnect [create_bd_cell -type ip -vlnv xilinx.com:ip:axi_interconnect:2.1 axi_ad9122_dma_interconnect] - set_property -dict [list CONFIG.NUM_MI {1}] $axi_ad9122_dma_interconnect + + set spi_csn_2_o [create_bd_port -dir O spi_csn_2_o] + set spi_csn_1_o [create_bd_port -dir O spi_csn_1_o] + set spi_csn_0_o [create_bd_port -dir O spi_csn_0_o] + set spi_csn_i [create_bd_port -dir I spi_csn_i] + +} else { + + set spi_csn_o [create_bd_port -dir O -from 2 -to 0 spi_csn_o] + set spi_csn_i [create_bd_port -dir I -from 2 -to 0 spi_csn_i] } - # adc peripherals - - set axi_ad9643 [create_bd_cell -type ip -vlnv analog.com:user:axi_ad9643:1.0 axi_ad9643] - - set axi_ad9643_dma [create_bd_cell -type ip -vlnv analog.com:user:axi_dmac:1.0 axi_ad9643_dma] - set_property -dict [list CONFIG.C_DMA_TYPE_SRC {2}] $axi_ad9643_dma - set_property -dict [list CONFIG.C_DMA_TYPE_DEST {0}] $axi_ad9643_dma - set_property -dict [list CONFIG.C_2D_TRANSFER {0}] $axi_ad9643_dma - set_property -dict [list CONFIG.C_CYCLIC {0}] $axi_ad9643_dma - set_property -dict [list CONFIG.C_DMA_DATA_WIDTH_DEST {64}] $axi_ad9643_dma - -if {$sys_zynq == 1} { - set axi_ad9643_dma_interconnect [create_bd_cell -type ip -vlnv xilinx.com:ip:axi_interconnect:2.1 axi_ad9643_dma_interconnect] - set_property -dict [list CONFIG.NUM_MI {1}] $axi_ad9643_dma_interconnect -} - - # additions to default configuration - - set_property -dict [list CONFIG.NUM_MI {11}] $axi_cpu_interconnect +set spi_clk_i [create_bd_port -dir I spi_clk_i] +set spi_clk_o [create_bd_port -dir O spi_clk_o] +set spi_sdo_i [create_bd_port -dir I spi_sdo_i] +set spi_sdo_o [create_bd_port -dir O spi_sdo_o] +set spi_sdi_i [create_bd_port -dir I spi_sdi_i] if {$sys_zynq == 0} { - set_property -dict [list CONFIG.NUM_SI {10}] $axi_mem_interconnect + + set gpio_fmcomms6_i [create_bd_port -dir I gpio_fmcomms6_i] + set gpio_fmcomms6_o [create_bd_port -dir O gpio_fmcomms6_o] + set gpio_fmcomms6_t [create_bd_port -dir O gpio_fmcomms6_t] } +# dma interface + +set adc_clk [create_bd_port -dir O adc_clk] +set adc_valid_0 [create_bd_port -dir O adc_valid_0] +set adc_enable_0 [create_bd_port -dir O adc_enable_0] +set adc_data_0 [create_bd_port -dir O -from 15 -to 0 adc_data_0] +set adc_valid_1 [create_bd_port -dir O adc_valid_1] +set adc_enable_1 [create_bd_port -dir O adc_enable_1] +set adc_data_1 [create_bd_port -dir O -from 15 -to 0 adc_data_1] +set adc_dma_wr [create_bd_port -dir I adc_dma_wr] +set adc_dma_sync [create_bd_port -dir I adc_dma_sync] +set adc_dma_wdata [create_bd_port -dir I -from 31 -to 0 adc_dma_wdata] + +# adc peripherals + +set axi_ad9652 [create_bd_cell -type ip -vlnv analog.com:user:axi_ad9652:1.0 axi_ad9652] + +set axi_ad9652_dma [create_bd_cell -type ip -vlnv analog.com:user:axi_dmac:1.0 axi_ad9652_dma] +set_property -dict [list CONFIG.C_DMA_TYPE_SRC {2}] $axi_ad9652_dma +set_property -dict [list CONFIG.C_DMA_TYPE_DEST {0}] $axi_ad9652_dma +set_property -dict [list CONFIG.C_2D_TRANSFER {0}] $axi_ad9652_dma +set_property -dict [list CONFIG.C_CYCLIC {0}] $axi_ad9652_dma +set_property -dict [list CONFIG.C_DMA_DATA_WIDTH_DEST {64}] $axi_ad9652_dma + if {$sys_zynq == 1} { + set axi_ad9652_dma_interconnect [create_bd_cell -type ip -vlnv xilinx.com:ip:axi_interconnect:2.1 axi_ad9652_dma_interconnect] + set_property -dict [list CONFIG.NUM_MI {1}] $axi_ad9652_dma_interconnect +} + +if {$sys_zynq == 0} { + + set axi_fmcomms6_gpio [create_bd_cell -type ip -vlnv xilinx.com:ip:axi_gpio:2.0 axi_fmcomms6_gpio] + set_property -dict [list CONFIG.C_IS_DUAL {0}] $axi_fmcomms6_gpio + set_property -dict [list CONFIG.C_GPIO_WIDTH {1}] $axi_fmcomms6_gpio + set_property -dict [list CONFIG.C_INTERRUPT_PRESENT {1}] $axi_fmcomms6_gpio + + set axi_fmcomms6_spi [create_bd_cell -type ip -vlnv xilinx.com:ip:axi_quad_spi:3.1 axi_fmcomms6_spi] + set_property -dict [list CONFIG.C_USE_STARTUP {0}] $axi_fmcomms6_spi + set_property -dict [list CONFIG.C_NUM_SS_BITS {3}] $axi_fmcomms6_spi + set_property -dict [list CONFIG.C_SCK_RATIO {8}] $axi_fmcomms6_spi +} + +# additions to default configuration + +if {$sys_zynq == 1} { + + set_property -dict [list CONFIG.NUM_MI {9}] $axi_cpu_interconnect set_property -dict [list CONFIG.PCW_USE_S_AXI_HP1 {1}] $sys_ps7 - set_property -dict [list CONFIG.PCW_USE_S_AXI_HP2 {1}] $sys_ps7 set_property -dict [list CONFIG.PCW_EN_CLK2_PORT {1}] $sys_ps7 set_property -dict [list CONFIG.PCW_EN_RST2_PORT {1}] $sys_ps7 set_property -dict [list CONFIG.PCW_FPGA2_PERIPHERAL_FREQMHZ {125.0}] $sys_ps7 -} + set_property -dict [list CONFIG.PCW_GPIO_EMIO_GPIO_IO {17}] $sys_ps7 + set_property -dict [list CONFIG.PCW_SPI0_PERIPHERAL_ENABLE {1}] $sys_ps7 + set_property -dict [list CONFIG.PCW_SPI0_SPI0_IO {EMIO}] $sys_ps7 -if {$sys_zynq == 0} { + set_property LEFT 16 [get_bd_ports GPIO_I] + set_property LEFT 16 [get_bd_ports GPIO_O] + set_property LEFT 16 [get_bd_ports GPIO_T] +} else { + + set_property -dict [list CONFIG.NUM_MI {11}] $axi_cpu_interconnect + set_property -dict [list CONFIG.NUM_SI {9}] $axi_mem_interconnect delete_bd_objs [get_bd_nets sys_concat_intc_din_2] [get_bd_ports unc_int2] delete_bd_objs [get_bd_nets sys_concat_intc_din_3] [get_bd_ports unc_int3] } -# reference clock shared with audio clock +# connections (spi and gpio) - set_property -dict [list CONFIG.CLKOUT2_USED {true}] $sys_audio_clkgen - set_property -dict [list CONFIG.CLKOUT2_REQUESTED_OUT_FREQ {30}] $sys_audio_clkgen +if {$sys_zynq == 1 } { -# connections (dac) + connect_bd_net -net spi_csn_2_o [get_bd_ports spi_csn_2_o] [get_bd_pins sys_ps7/SPI0_SS2_O] + connect_bd_net -net spi_csn_1_o [get_bd_ports spi_csn_1_o] [get_bd_pins sys_ps7/SPI0_SS1_O] + connect_bd_net -net spi_csn_0_o [get_bd_ports spi_csn_0_o] [get_bd_pins sys_ps7/SPI0_SS_O] + connect_bd_net -net spi_csn_i [get_bd_ports spi_csn_i] [get_bd_pins sys_ps7/SPI0_SS_I] + connect_bd_net -net spi_clk_i [get_bd_ports spi_clk_i] [get_bd_pins sys_ps7/SPI0_SCLK_I] + connect_bd_net -net spi_clk_o [get_bd_ports spi_clk_o] [get_bd_pins sys_ps7/SPI0_SCLK_O] + connect_bd_net -net spi_sdo_i [get_bd_ports spi_sdo_i] [get_bd_pins sys_ps7/SPI0_MOSI_I] + connect_bd_net -net spi_sdo_o [get_bd_ports spi_sdo_o] [get_bd_pins sys_ps7/SPI0_MOSI_O] + connect_bd_net -net spi_sdi_i [get_bd_ports spi_sdi_i] [get_bd_pins sys_ps7/SPI0_MISO_I] - connect_bd_net -net dac_div_clk [get_bd_ports dac_clk] [get_bd_pins axi_ad9122/dac_div_clk] [get_bd_pins axi_ad9122_dma/fifo_rd_clk] +} else { - connect_bd_net -net axi_ad9122_dac_clk_in_p [get_bd_ports dac_clk_in_p] [get_bd_pins axi_ad9122/dac_clk_in_p] - connect_bd_net -net axi_ad9122_dac_clk_in_n [get_bd_ports dac_clk_in_n] [get_bd_pins axi_ad9122/dac_clk_in_n] - connect_bd_net -net axi_ad9122_dac_clk_out_p [get_bd_ports dac_clk_out_p] [get_bd_pins axi_ad9122/dac_clk_out_p] - connect_bd_net -net axi_ad9122_dac_clk_out_n [get_bd_ports dac_clk_out_n] [get_bd_pins axi_ad9122/dac_clk_out_n] - connect_bd_net -net axi_ad9122_dac_frame_out_p [get_bd_ports dac_frame_out_p] [get_bd_pins axi_ad9122/dac_frame_out_p] - connect_bd_net -net axi_ad9122_dac_frame_out_n [get_bd_ports dac_frame_out_n] [get_bd_pins axi_ad9122/dac_frame_out_n] - connect_bd_net -net axi_ad9122_dac_data_out_p [get_bd_ports dac_data_out_p] [get_bd_pins axi_ad9122/dac_data_out_p] - connect_bd_net -net axi_ad9122_dac_data_out_n [get_bd_ports dac_data_out_n] [get_bd_pins axi_ad9122/dac_data_out_n] + connect_bd_net -net spi_csn_i [get_bd_ports spi_csn_i] [get_bd_pins axi_fmcomms6_spi/ss_i] + connect_bd_net -net spi_csn_o [get_bd_ports spi_csn_o] [get_bd_pins axi_fmcomms6_spi/ss_o] + connect_bd_net -net spi_clk_i [get_bd_ports spi_clk_i] [get_bd_pins axi_fmcomms6_spi/sck_i] + connect_bd_net -net spi_clk_o [get_bd_ports spi_clk_o] [get_bd_pins axi_fmcomms6_spi/sck_o] + connect_bd_net -net spi_sdo_i [get_bd_ports spi_sdo_i] [get_bd_pins axi_fmcomms6_spi/io0_i] + connect_bd_net -net spi_sdo_o [get_bd_ports spi_sdo_o] [get_bd_pins axi_fmcomms6_spi/io0_o] + connect_bd_net -net spi_sdi_i [get_bd_ports spi_sdi_i] [get_bd_pins axi_fmcomms6_spi/io1_i] - connect_bd_net -net axi_ad9122_dac_valid_0 [get_bd_pins axi_ad9122/dac_valid_0] [get_bd_ports dac_valid_0] - connect_bd_net -net axi_ad9122_dac_enable_0 [get_bd_pins axi_ad9122/dac_enable_0] [get_bd_ports dac_enable_0] - connect_bd_net -net axi_ad9122_dac_ddata_0 [get_bd_pins axi_ad9122/dac_ddata_0] [get_bd_ports dac_ddata_0] - connect_bd_net -net axi_ad9122_dac_valid_1 [get_bd_pins axi_ad9122/dac_valid_1] [get_bd_ports dac_valid_1] - connect_bd_net -net axi_ad9122_dac_enable_1 [get_bd_pins axi_ad9122/dac_enable_1] [get_bd_ports dac_enable_1] - connect_bd_net -net axi_ad9122_dac_ddata_1 [get_bd_pins axi_ad9122/dac_ddata_1] [get_bd_ports dac_ddata_1] - connect_bd_net -net axi_ad9122_dac_dunf [get_bd_pins axi_ad9122/dac_dunf] [get_bd_pins axi_ad9122_dma/fifo_rd_underflow] + connect_bd_net -net gpio_fmcomms6_i [get_bd_ports gpio_fmcomms6_i] [get_bd_pins axi_fmcomms6_gpio/gpio_io_i] + connect_bd_net -net gpio_fmcomms6_o [get_bd_ports gpio_fmcomms6_o] [get_bd_pins axi_fmcomms6_gpio/gpio_io_o] + connect_bd_net -net gpio_fmcomms6_t [get_bd_ports gpio_fmcomms6_t] [get_bd_pins axi_fmcomms6_gpio/gpio_io_t] - connect_bd_net -net axi_ad9122_dma_drd [get_bd_pins axi_ad9122_dma/fifo_rd_en] [get_bd_ports dac_dma_rd] - connect_bd_net -net axi_ad9122_dma_ddata [get_bd_pins axi_ad9122_dma/fifo_rd_dout] [get_bd_ports dac_dma_rdata] - connect_bd_net -net axi_ad9122_dma_irq [get_bd_pins axi_ad9122_dma/irq] [get_bd_pins sys_concat_intc/In3] + connect_bd_net -net axi_fmcomms6_spi_irq [get_bd_pins axi_fmcomms6_spi/ip2intc_irpt] [get_bd_pins sys_concat_intc/In5] + connect_bd_net -net axi_fmcomms6_gpio_irq [get_bd_pins axi_fmcomms6_gpio/ip2intc_irpt] [get_bd_pins sys_concat_intc/In6] +} - # connections (adc) +# connections (adc) - p_sys_wfifo [current_bd_instance .] sys_wfifo 32 64 +p_sys_wfifo [current_bd_instance .] sys_wfifo 32 64 - connect_bd_net -net adc_clk [get_bd_ports adc_clk] [get_bd_pins axi_ad9643/adc_clk] [get_bd_pins sys_wfifo/m_clk] - connect_bd_net -net sys_200m_clk [get_bd_pins sys_wfifo/s_clk] [get_bd_pins axi_ad9643_dma/fifo_wr_clk] [get_bd_pins axi_ad9643/delay_clk] - connect_bd_net -net sys_100m_resetn [get_bd_pins sys_wfifo/rstn] $sys_100m_resetn_source +connect_bd_net -net adc_clk [get_bd_ports adc_clk] [get_bd_pins axi_ad9652/adc_clk] [get_bd_pins sys_wfifo/m_clk] +connect_bd_net -net sys_200m_clk [get_bd_pins sys_wfifo/s_clk] [get_bd_pins axi_ad9652_dma/fifo_wr_clk] [get_bd_pins axi_ad9652/delay_clk] +connect_bd_net -net sys_100m_resetn [get_bd_pins sys_wfifo/rstn] $sys_100m_resetn_source - connect_bd_net -net axi_ad9643_adc_clk_in_p [get_bd_ports adc_clk_in_p] [get_bd_pins axi_ad9643/adc_clk_in_p] - connect_bd_net -net axi_ad9643_adc_clk_in_n [get_bd_ports adc_clk_in_n] [get_bd_pins axi_ad9643/adc_clk_in_n] - connect_bd_net -net axi_ad9643_adc_or_in_p [get_bd_ports adc_or_in_p] [get_bd_pins axi_ad9643/adc_or_in_p] - connect_bd_net -net axi_ad9643_adc_or_in_n [get_bd_ports adc_or_in_n] [get_bd_pins axi_ad9643/adc_or_in_n] - connect_bd_net -net axi_ad9643_adc_data_in_p [get_bd_ports adc_data_in_p] [get_bd_pins axi_ad9643/adc_data_in_p] - connect_bd_net -net axi_ad9643_adc_data_in_n [get_bd_ports adc_data_in_n] [get_bd_pins axi_ad9643/adc_data_in_n] +connect_bd_net -net axi_ad9652_adc_clk_in_p [get_bd_ports adc_clk_in_p] [get_bd_pins axi_ad9652/adc_clk_in_p] +connect_bd_net -net axi_ad9652_adc_clk_in_n [get_bd_ports adc_clk_in_n] [get_bd_pins axi_ad9652/adc_clk_in_n] +connect_bd_net -net axi_ad9652_adc_or_in_p [get_bd_ports adc_or_in_p] [get_bd_pins axi_ad9652/adc_or_in_p] +connect_bd_net -net axi_ad9652_adc_or_in_n [get_bd_ports adc_or_in_n] [get_bd_pins axi_ad9652/adc_or_in_n] +connect_bd_net -net axi_ad9652_adc_data_in_p [get_bd_ports adc_data_in_p] [get_bd_pins axi_ad9652/adc_data_in_p] +connect_bd_net -net axi_ad9652_adc_data_in_n [get_bd_ports adc_data_in_n] [get_bd_pins axi_ad9652/adc_data_in_n] - connect_bd_net -net axi_ad9643_adc_valid_0 [get_bd_ports adc_valid_0] [get_bd_pins axi_ad9643/adc_valid_0] - connect_bd_net -net axi_ad9643_adc_enable_0 [get_bd_ports adc_enable_0] [get_bd_pins axi_ad9643/adc_enable_0] - connect_bd_net -net axi_ad9643_adc_data_0 [get_bd_ports adc_data_0] [get_bd_pins axi_ad9643/adc_data_0] - connect_bd_net -net axi_ad9643_adc_valid_1 [get_bd_ports adc_valid_1] [get_bd_pins axi_ad9643/adc_valid_1] - connect_bd_net -net axi_ad9643_adc_enable_1 [get_bd_ports adc_enable_1] [get_bd_pins axi_ad9643/adc_enable_1] - connect_bd_net -net axi_ad9643_adc_data_1 [get_bd_ports adc_data_1] [get_bd_pins axi_ad9643/adc_data_1] - connect_bd_net -net axi_ad9643_adc_dovf [get_bd_pins axi_ad9643/adc_dovf] [get_bd_pins sys_wfifo/m_wovf] +connect_bd_net -net axi_ad9652_adc_valid_0 [get_bd_ports adc_valid_0] [get_bd_pins axi_ad9652/adc_valid_0] +connect_bd_net -net axi_ad9652_adc_enable_0 [get_bd_ports adc_enable_0] [get_bd_pins axi_ad9652/adc_enable_0] +connect_bd_net -net axi_ad9652_adc_data_0 [get_bd_ports adc_data_0] [get_bd_pins axi_ad9652/adc_data_0] +connect_bd_net -net axi_ad9652_adc_valid_1 [get_bd_ports adc_valid_1] [get_bd_pins axi_ad9652/adc_valid_1] +connect_bd_net -net axi_ad9652_adc_enable_1 [get_bd_ports adc_enable_1] [get_bd_pins axi_ad9652/adc_enable_1] +connect_bd_net -net axi_ad9652_adc_data_1 [get_bd_ports adc_data_1] [get_bd_pins axi_ad9652/adc_data_1] +connect_bd_net -net axi_ad9652_adc_dovf [get_bd_pins axi_ad9652/adc_dovf] [get_bd_pins sys_wfifo/m_wovf] - connect_bd_net -net axi_ad9643_fifo_wr [get_bd_ports adc_dma_wr] [get_bd_pins sys_wfifo/m_wr] - connect_bd_net -net axi_ad9643_fifo_wdata [get_bd_ports adc_dma_wdata] [get_bd_pins sys_wfifo/m_wdata] +connect_bd_net -net axi_ad9652_fifo_wr [get_bd_ports adc_dma_wr] [get_bd_pins sys_wfifo/m_wr] +connect_bd_net -net axi_ad9652_fifo_wdata [get_bd_ports adc_dma_wdata] [get_bd_pins sys_wfifo/m_wdata] - connect_bd_net -net axi_ad9643_dma_dwr [get_bd_pins sys_wfifo/s_wr] [get_bd_pins axi_ad9643_dma/fifo_wr_en] - connect_bd_net -net axi_ad9643_dma_dsync [get_bd_ports adc_dma_sync] [get_bd_pins axi_ad9643_dma/fifo_wr_sync] - connect_bd_net -net axi_ad9643_dma_ddata [get_bd_pins sys_wfifo/s_wdata] [get_bd_pins axi_ad9643_dma/fifo_wr_din] - connect_bd_net -net axi_ad9643_dma_dovf [get_bd_pins sys_wfifo/s_wovf] [get_bd_pins axi_ad9643_dma/fifo_wr_overflow] - connect_bd_net -net axi_ad9643_dma_irq [get_bd_pins axi_ad9643_dma/irq] [get_bd_pins sys_concat_intc/In2] +connect_bd_net -net axi_ad9652_dma_dwr [get_bd_pins sys_wfifo/s_wr] [get_bd_pins axi_ad9652_dma/fifo_wr_en] +connect_bd_net -net axi_ad9652_dma_dsync [get_bd_ports adc_dma_sync] [get_bd_pins axi_ad9652_dma/fifo_wr_sync] +connect_bd_net -net axi_ad9652_dma_ddata [get_bd_pins sys_wfifo/s_wdata] [get_bd_pins axi_ad9652_dma/fifo_wr_din] +connect_bd_net -net axi_ad9652_dma_dovf [get_bd_pins sys_wfifo/s_wovf] [get_bd_pins axi_ad9652_dma/fifo_wr_overflow] +connect_bd_net -net axi_ad9652_dma_irq [get_bd_pins axi_ad9652_dma/irq] [get_bd_pins sys_concat_intc/In2] +# interconnect (cpu) - # interconnect (cpu) +connect_bd_intf_net -intf_net axi_cpu_interconnect_m07_axi [get_bd_intf_pins axi_cpu_interconnect/M07_AXI] [get_bd_intf_pins axi_ad9652/s_axi] +connect_bd_intf_net -intf_net axi_cpu_interconnect_m08_axi [get_bd_intf_pins axi_cpu_interconnect/M08_AXI] [get_bd_intf_pins axi_ad9652_dma/s_axi] +connect_bd_net -net sys_100m_clk [get_bd_pins axi_cpu_interconnect/M07_ACLK] $sys_100m_clk_source +connect_bd_net -net sys_100m_clk [get_bd_pins axi_cpu_interconnect/M08_ACLK] $sys_100m_clk_source +connect_bd_net -net sys_100m_resetn [get_bd_pins axi_cpu_interconnect/M07_ARESETN] $sys_100m_resetn_source +connect_bd_net -net sys_100m_resetn [get_bd_pins axi_cpu_interconnect/M08_ARESETN] $sys_100m_resetn_source +connect_bd_net -net sys_100m_clk [get_bd_pins axi_ad9652/s_axi_aclk] +connect_bd_net -net sys_100m_clk [get_bd_pins axi_ad9652_dma/s_axi_aclk] +connect_bd_net -net sys_100m_resetn [get_bd_pins axi_ad9652/s_axi_aresetn] +connect_bd_net -net sys_100m_resetn [get_bd_pins axi_ad9652_dma/s_axi_aresetn] - connect_bd_intf_net -intf_net axi_cpu_interconnect_m07_axi [get_bd_intf_pins axi_cpu_interconnect/M07_AXI] [get_bd_intf_pins axi_ad9122/s_axi] - connect_bd_intf_net -intf_net axi_cpu_interconnect_m08_axi [get_bd_intf_pins axi_cpu_interconnect/M08_AXI] [get_bd_intf_pins axi_ad9643/s_axi] - connect_bd_intf_net -intf_net axi_cpu_interconnect_m09_axi [get_bd_intf_pins axi_cpu_interconnect/M09_AXI] [get_bd_intf_pins axi_ad9643_dma/s_axi] - connect_bd_intf_net -intf_net axi_cpu_interconnect_m10_axi [get_bd_intf_pins axi_cpu_interconnect/M10_AXI] [get_bd_intf_pins axi_ad9122_dma/s_axi] - connect_bd_net -net sys_100m_clk [get_bd_pins axi_cpu_interconnect/M07_ACLK] $sys_100m_clk_source - connect_bd_net -net sys_100m_clk [get_bd_pins axi_cpu_interconnect/M08_ACLK] $sys_100m_clk_source +if {$sys_zynq == 0} { + + connect_bd_intf_net -intf_net axi_cpu_interconnect_m09_axi [get_bd_intf_pins axi_cpu_interconnect/M09_AXI] [get_bd_intf_pins axi_fmcomms6_spi/axi_lite] + connect_bd_intf_net -intf_net axi_cpu_interconnect_m10_axi [get_bd_intf_pins axi_cpu_interconnect/M10_AXI] [get_bd_intf_pins axi_fmcomms6_gpio/s_axi] connect_bd_net -net sys_100m_clk [get_bd_pins axi_cpu_interconnect/M09_ACLK] $sys_100m_clk_source connect_bd_net -net sys_100m_clk [get_bd_pins axi_cpu_interconnect/M10_ACLK] $sys_100m_clk_source - connect_bd_net -net sys_100m_clk [get_bd_pins axi_ad9122/s_axi_aclk] - connect_bd_net -net sys_100m_clk [get_bd_pins axi_ad9122_dma/s_axi_aclk] - connect_bd_net -net sys_100m_resetn [get_bd_pins axi_ad9122/s_axi_aresetn] - connect_bd_net -net sys_100m_resetn [get_bd_pins axi_ad9122_dma/s_axi_aresetn] - connect_bd_net -net sys_100m_resetn [get_bd_pins axi_cpu_interconnect/M07_ARESETN] $sys_100m_resetn_source - connect_bd_net -net sys_100m_resetn [get_bd_pins axi_cpu_interconnect/M08_ARESETN] $sys_100m_resetn_source connect_bd_net -net sys_100m_resetn [get_bd_pins axi_cpu_interconnect/M09_ARESETN] $sys_100m_resetn_source connect_bd_net -net sys_100m_resetn [get_bd_pins axi_cpu_interconnect/M10_ARESETN] $sys_100m_resetn_source - connect_bd_net -net sys_100m_clk [get_bd_pins axi_ad9643/s_axi_aclk] - connect_bd_net -net sys_100m_clk [get_bd_pins axi_ad9643_dma/s_axi_aclk] - connect_bd_net -net sys_100m_resetn [get_bd_pins axi_ad9643/s_axi_aresetn] - connect_bd_net -net sys_100m_resetn [get_bd_pins axi_ad9643_dma/s_axi_aresetn] + connect_bd_net -net sys_100m_clk [get_bd_pins axi_fmcomms6_spi/s_axi_aclk] + connect_bd_net -net sys_100m_clk [get_bd_pins axi_fmcomms6_gpio/s_axi_aclk] + connect_bd_net -net sys_100m_clk [get_bd_pins axi_fmcomms6_spi/ext_spi_clk] + connect_bd_net -net sys_100m_resetn [get_bd_pins axi_fmcomms6_spi/s_axi_aresetn] + connect_bd_net -net sys_100m_resetn [get_bd_pins axi_fmcomms6_gpio/s_axi_aresetn] +} - # memory interconnects share the same clock (fclk2) +# memory interconnects share the same clock (fclk2) if {$sys_zynq == 1} { set sys_fmc_dma_clk_source [get_bd_pins sys_ps7/FCLK_CLK2] connect_bd_net -net sys_fmc_dma_clk $sys_fmc_dma_clk_source } -# interconnect (mem/dac) - -if {$sys_zynq == 0 } { - connect_bd_intf_net -intf_net axi_mem_interconnect_s08_axi [get_bd_intf_pins axi_mem_interconnect/S08_AXI] [get_bd_intf_pins axi_ad9122_dma/m_src_axi] - connect_bd_net -net sys_200m_clk [get_bd_pins axi_mem_interconnect/S08_ACLK] $sys_200m_clk_source - connect_bd_net -net sys_200m_clk [get_bd_pins axi_ad9122_dma/m_src_axi_aclk] - connect_bd_net -net sys_100m_resetn [get_bd_pins axi_mem_interconnect/S08_ARESETN] $sys_100m_resetn_source - connect_bd_net -net sys_100m_resetn [get_bd_pins axi_ad9122_dma/m_src_axi_aresetn] -} else { - connect_bd_intf_net -intf_net axi_ad9122_dma_interconnect_s00_axi [get_bd_intf_pins axi_ad9122_dma_interconnect/S00_AXI] [get_bd_intf_pins axi_ad9122_dma/m_src_axi] - connect_bd_intf_net -intf_net axi_ad9122_dma_interconnect_m00_axi [get_bd_intf_pins axi_ad9122_dma_interconnect/M00_AXI] [get_bd_intf_pins sys_ps7/S_AXI_HP2] - connect_bd_net -net sys_fmc_dma_clk [get_bd_pins axi_ad9122_dma_interconnect/ACLK] $sys_fmc_dma_clk_source - connect_bd_net -net sys_fmc_dma_clk [get_bd_pins axi_ad9122_dma_interconnect/M00_ACLK] $sys_fmc_dma_clk_source - connect_bd_net -net sys_fmc_dma_clk [get_bd_pins axi_ad9122_dma_interconnect/S00_ACLK] $sys_fmc_dma_clk_source - connect_bd_net -net sys_fmc_dma_clk [get_bd_pins axi_ad9122_dma/m_src_axi_aclk] - connect_bd_net -net sys_fmc_dma_clk [get_bd_pins sys_ps7/S_AXI_HP2_ACLK] - connect_bd_net -net sys_100m_resetn [get_bd_pins axi_ad9122_dma_interconnect/ARESETN] $sys_100m_resetn_source - connect_bd_net -net sys_100m_resetn [get_bd_pins axi_ad9122_dma_interconnect/M00_ARESETN] $sys_100m_resetn_source - connect_bd_net -net sys_100m_resetn [get_bd_pins axi_ad9122_dma_interconnect/S00_ARESETN] $sys_100m_resetn_source - connect_bd_net -net sys_100m_resetn [get_bd_pins axi_ad9122_dma/m_src_axi_aresetn] -} - # interconnect (mem/adc) -if {$sys_zynq == 0 } { - connect_bd_intf_net -intf_net axi_mem_interconnect_s09_axi [get_bd_intf_pins axi_mem_interconnect/S09_AXI] [get_bd_intf_pins axi_ad9643_dma/m_dest_axi] - connect_bd_net -net sys_200m_clk [get_bd_pins axi_mem_interconnect/S09_ACLK] $sys_200m_clk_source - connect_bd_net -net sys_200m_clk [get_bd_pins axi_ad9643_dma/m_dest_axi_aclk] - connect_bd_net -net sys_100m_resetn [get_bd_pins axi_mem_interconnect/S09_ARESETN] $sys_100m_resetn_source - connect_bd_net -net sys_100m_resetn [get_bd_pins axi_ad9643_dma/m_dest_axi_aresetn] +if {$sys_zynq == 0} { + + connect_bd_intf_net -intf_net axi_mem_interconnect_s08_axi [get_bd_intf_pins axi_mem_interconnect/S08_AXI] [get_bd_intf_pins axi_ad9652_dma/m_dest_axi] + connect_bd_net -net sys_200m_clk [get_bd_pins axi_mem_interconnect/S08_ACLK] $sys_200m_clk_source + connect_bd_net -net sys_200m_clk [get_bd_pins axi_ad9652_dma/m_dest_axi_aclk] + connect_bd_net -net sys_100m_resetn [get_bd_pins axi_mem_interconnect/S08_ARESETN] $sys_100m_resetn_source + connect_bd_net -net sys_100m_resetn [get_bd_pins axi_ad9652_dma/m_dest_axi_aresetn] + } else { - connect_bd_intf_net -intf_net axi_ad9643_dma_interconnect_s00_axi [get_bd_intf_pins axi_ad9643_dma_interconnect/S00_AXI] [get_bd_intf_pins axi_ad9643_dma/m_dest_axi] - connect_bd_intf_net -intf_net axi_ad9643_dma_interconnect_m00_axi [get_bd_intf_pins axi_ad9643_dma_interconnect/M00_AXI] [get_bd_intf_pins sys_ps7/S_AXI_HP1] - connect_bd_net -net sys_fmc_dma_clk [get_bd_pins axi_ad9643_dma_interconnect/ACLK] $sys_fmc_dma_clk_source - connect_bd_net -net sys_fmc_dma_clk [get_bd_pins axi_ad9643_dma_interconnect/M00_ACLK] $sys_fmc_dma_clk_source - connect_bd_net -net sys_fmc_dma_clk [get_bd_pins axi_ad9643_dma_interconnect/S00_ACLK] $sys_fmc_dma_clk_source - connect_bd_net -net sys_fmc_dma_clk [get_bd_pins axi_ad9643_dma/m_dest_axi_aclk] + + connect_bd_intf_net -intf_net axi_ad9652_dma_interconnect_s00_axi [get_bd_intf_pins axi_ad9652_dma_interconnect/S00_AXI] [get_bd_intf_pins axi_ad9652_dma/m_dest_axi] + connect_bd_intf_net -intf_net axi_ad9652_dma_interconnect_m00_axi [get_bd_intf_pins axi_ad9652_dma_interconnect/M00_AXI] [get_bd_intf_pins sys_ps7/S_AXI_HP1] + connect_bd_net -net sys_fmc_dma_clk [get_bd_pins axi_ad9652_dma_interconnect/ACLK] $sys_fmc_dma_clk_source + connect_bd_net -net sys_fmc_dma_clk [get_bd_pins axi_ad9652_dma_interconnect/M00_ACLK] $sys_fmc_dma_clk_source + connect_bd_net -net sys_fmc_dma_clk [get_bd_pins axi_ad9652_dma_interconnect/S00_ACLK] $sys_fmc_dma_clk_source + connect_bd_net -net sys_fmc_dma_clk [get_bd_pins axi_ad9652_dma/m_dest_axi_aclk] connect_bd_net -net sys_fmc_dma_clk [get_bd_pins sys_ps7/S_AXI_HP1_ACLK] - connect_bd_net -net sys_100m_resetn [get_bd_pins axi_ad9643_dma_interconnect/ARESETN] $sys_100m_resetn_source - connect_bd_net -net sys_100m_resetn [get_bd_pins axi_ad9643_dma_interconnect/M00_ARESETN] $sys_100m_resetn_source - connect_bd_net -net sys_100m_resetn [get_bd_pins axi_ad9643_dma_interconnect/S00_ARESETN] $sys_100m_resetn_source - connect_bd_net -net sys_100m_resetn [get_bd_pins axi_ad9643_dma/m_dest_axi_aresetn] + connect_bd_net -net sys_100m_resetn [get_bd_pins axi_ad9652_dma_interconnect/ARESETN] $sys_100m_resetn_source + connect_bd_net -net sys_100m_resetn [get_bd_pins axi_ad9652_dma_interconnect/M00_ARESETN] $sys_100m_resetn_source + connect_bd_net -net sys_100m_resetn [get_bd_pins axi_ad9652_dma_interconnect/S00_ARESETN] $sys_100m_resetn_source + connect_bd_net -net sys_100m_resetn [get_bd_pins axi_ad9652_dma/m_dest_axi_aresetn] } - # ila (adc) +# ila (adc) - set ila_adc [create_bd_cell -type ip -vlnv xilinx.com:ip:ila:3.0 ila_adc] - set_property -dict [list CONFIG.C_NUM_OF_PROBES {2}] $ila_adc - set_property -dict [list CONFIG.C_PROBE0_WIDTH {1}] $ila_adc - set_property -dict [list CONFIG.C_PROBE1_WIDTH {64}] $ila_adc - set_property -dict [list CONFIG.C_TRIGIN_EN {false}] $ila_adc +set ila_adc [create_bd_cell -type ip -vlnv xilinx.com:ip:ila:3.0 ila_adc] +set_property -dict [list CONFIG.C_NUM_OF_PROBES {2}] $ila_adc +set_property -dict [list CONFIG.C_PROBE0_WIDTH {1}] $ila_adc +set_property -dict [list CONFIG.C_PROBE1_WIDTH {64}] $ila_adc +set_property -dict [list CONFIG.C_TRIGIN_EN {false}] $ila_adc - connect_bd_net -net sys_200m_clk [get_bd_pins ila_adc/clk] - connect_bd_net -net axi_ad9643_dma_dwr [get_bd_pins ila_adc/probe0] - connect_bd_net -net axi_ad9643_dma_ddata [get_bd_pins ila_adc/probe1] +connect_bd_net -net sys_200m_clk [get_bd_pins ila_adc/clk] +connect_bd_net -net axi_ad9652_dma_dwr [get_bd_pins ila_adc/probe0] +connect_bd_net -net axi_ad9652_dma_ddata [get_bd_pins ila_adc/probe1] - # reference clock +# address map - connect_bd_net -net fmcomms1_ref_clk [get_bd_pins sys_audio_clkgen/clk_out2] [get_bd_ports ref_clk] - - # address map - - create_bd_addr_seg -range 0x00010000 -offset 0x74200000 $sys_addr_cntrl_space [get_bd_addr_segs axi_ad9122/s_axi/axi_lite] SEG_data_ad9122 - create_bd_addr_seg -range 0x00010000 -offset 0x79020000 $sys_addr_cntrl_space [get_bd_addr_segs axi_ad9643/s_axi/axi_lite] SEG_data_ad9643 - create_bd_addr_seg -range 0x00010000 -offset 0x7c400000 $sys_addr_cntrl_space [get_bd_addr_segs axi_ad9643_dma/s_axi/axi_lite] SEG_data_ad9122_dma - create_bd_addr_seg -range 0x00010000 -offset 0x7c420000 $sys_addr_cntrl_space [get_bd_addr_segs axi_ad9122_dma/s_axi/axi_lite] SEG_data_ad9643_dma +create_bd_addr_seg -range 0x00010000 -offset 0x79020000 $sys_addr_cntrl_space [get_bd_addr_segs axi_ad9652/s_axi/axi_lite] SEG_data_ad9652 +create_bd_addr_seg -range 0x00010000 -offset 0x7c420000 $sys_addr_cntrl_space [get_bd_addr_segs axi_ad9652_dma/s_axi/axi_lite] SEG_data_ad9652_dma if {$sys_zynq == 0} { - create_bd_addr_seg -range $sys_mem_size -offset 0x80000000 [get_bd_addr_spaces axi_ad9643_dma/m_dest_axi] [get_bd_addr_segs axi_ddr_cntrl/memmap/memaddr] SEG_axi_ddr_cntrl - create_bd_addr_seg -range $sys_mem_size -offset 0x80000000 [get_bd_addr_spaces axi_ad9122_dma/m_src_axi] [get_bd_addr_segs axi_ddr_cntrl/memmap/memaddr] SEG_axi_ddr_cntrl -} else { - create_bd_addr_seg -range $sys_mem_size -offset 0x00000000 [get_bd_addr_spaces axi_ad9643_dma/m_dest_axi] [get_bd_addr_segs sys_ps7/S_AXI_HP1/HP1_DDR_LOWOCM] SEG_sys_ps7_hp1_ddr_lowocm - create_bd_addr_seg -range $sys_mem_size -offset 0x00000000 [get_bd_addr_spaces axi_ad9122_dma/m_src_axi] [get_bd_addr_segs sys_ps7/S_AXI_HP2/HP2_DDR_LOWOCM] SEG_sys_ps7_hp2_ddr_lowocm + create_bd_addr_seg -range 0x00010000 -offset 0x44A70000 $sys_addr_cntrl_space [get_bd_addr_segs axi_fmcomms6_spi/axi_lite/Reg] SEG_data_fmcomms6_spi + create_bd_addr_seg -range 0x00010000 -offset 0x40030000 $sys_addr_cntrl_space [get_bd_addr_segs axi_fmcomms6_gpio/s_axi/Reg] SEG_data_gpio_3 +} + +if {$sys_zynq == 0} { + create_bd_addr_seg -range $sys_mem_size -offset 0x80000000 [get_bd_addr_spaces axi_ad9652_dma/m_dest_axi] [get_bd_addr_segs axi_ddr_cntrl/memmap/memaddr] SEG_axi_ddr_cntrl +} else { + create_bd_addr_seg -range $sys_mem_size -offset 0x00000000 [get_bd_addr_spaces axi_ad9652_dma/m_dest_axi] [get_bd_addr_segs sys_ps7/S_AXI_HP1/HP1_DDR_LOWOCM] SEG_sys_ps7_hp1_ddr_lowocm } diff --git a/projects/fmcomms6/common/fmcomms6_spi.v b/projects/fmcomms6/common/fmcomms6_spi.v new file mode 100644 index 000000000..3e43e4f4b --- /dev/null +++ b/projects/fmcomms6/common/fmcomms6_spi.v @@ -0,0 +1,109 @@ +// *************************************************************************** +// *************************************************************************** +// Copyright 2011(c) Analog Devices, Inc. +// +// All rights reserved. +// +// Redistribution and use in source and binary forms, with or without modification, +// are permitted provided that the following conditions are met: +// - Redistributions of source code must retain the above copyright +// notice, this list of conditions and the following disclaimer. +// - Redistributions in binary form must reproduce the above copyright +// notice, this list of conditions and the following disclaimer in +// the documentation and/or other materials provided with the +// distribution. +// - Neither the name of Analog Devices, Inc. nor the names of its +// contributors may be used to endorse or promote products derived +// from this software without specific prior written permission. +// - The use of this software may or may not infringe the patent rights +// of one or more patent holders. This license does not release you +// from the requirement that you obtain separate licenses from these +// patent holders to use this software. +// - Use of the software either in source or binary form, must be run +// on or directly connected to an Analog Devices Inc. component. +// +// THIS SOFTWARE IS PROVIDED BY ANALOG DEVICES "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, +// INCLUDING, BUT NOT LIMITED TO, NON-INFRINGEMENT, MERCHANTABILITY AND FITNESS FOR A +// PARTICULAR PURPOSE ARE DISCLAIMED. +// +// IN NO EVENT SHALL ANALOG DEVICES BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, +// EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, INTELLECTUAL PROPERTY +// RIGHTS, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR +// BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, +// STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF +// THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +// *************************************************************************** +// *************************************************************************** + +`timescale 1ns/100ps + +module fmcomms6_spi ( + + spi_csn, + spi_clk, + spi_mosi, + spi_miso, + + spi_sdio); + + // 4 wire + + input [ 2:0] spi_csn; + input spi_clk; + input spi_mosi; + output spi_miso; + + // 3 wire + + inout spi_sdio; + + // internal registers + + reg [ 5:0] spi_count = 'd0; + reg spi_rd_wr_n = 'd0; + reg spi_enable = 'd0; + + // internal signals + + wire spi_csn_s; + wire spi_enable_s; + + // check on rising edge and change on falling edge + + assign spi_csn_s = & spi_csn; + assign spi_enable_s = spi_enable & ~spi_csn_s; + + always @(posedge spi_clk or posedge spi_csn_s) begin + if (spi_csn_s == 1'b1) begin + spi_count <= 6'd0; + spi_rd_wr_n <= 1'd0; + end else begin + spi_count <= spi_count + 1'b1; + if (spi_count == 6'd0) begin + spi_rd_wr_n <= spi_mosi; + end + end + end + + always @(negedge spi_clk or posedge spi_csn_s) begin + if (spi_csn_s == 1'b1) begin + spi_enable <= 1'b0; + end else begin + if ((spi_count == 6'd16) && (spi_csn[2] == 1'b1)) begin + spi_enable <= spi_rd_wr_n; + end + end + end + + // io butter + + IOBUF i_iobuf_sdio ( + .T (spi_enable_s), + .I (spi_mosi), + .O (spi_miso), + .IO (spi_sdio)); + +endmodule + +// *************************************************************************** +// *************************************************************************** diff --git a/projects/fmcomms6/zc706/system_bd.tcl b/projects/fmcomms6/zc706/system_bd.tcl index 5f9cc885f..f1a60dc20 100644 --- a/projects/fmcomms6/zc706/system_bd.tcl +++ b/projects/fmcomms6/zc706/system_bd.tcl @@ -1,4 +1,4 @@ source $ad_hdl_dir/projects/common/zc706/zc706_system_bd.tcl - source ../common/fmcomms1_bd.tcl + source ../common/fmcomms6_bd.tcl diff --git a/projects/fmcomms6/zc706/system_constr.xdc b/projects/fmcomms6/zc706/system_constr.xdc index 9e19d5482..a650a93ee 100644 --- a/projects/fmcomms6/zc706/system_constr.xdc +++ b/projects/fmcomms6/zc706/system_constr.xdc @@ -1,94 +1,62 @@ -# reference - -set_property -dict {PACKAGE_PIN AB27 IOSTANDARD LVDS_25 DIFF_TERM TRUE} [get_ports ref_clk_out_p] ; ## FMC1_LPC_LA17_CC_P -set_property -dict {PACKAGE_PIN AC27 IOSTANDARD LVDS_25 DIFF_TERM TRUE} [get_ports ref_clk_out_n] ; ## FMC1_LPC_LA17_CC_N - -# dac - -set_property -dict {PACKAGE_PIN AG17 IOSTANDARD LVDS_25 DIFF_TERM TRUE} [get_ports dac_clk_in_p] ; ## FMC1_LPC_CLK0_M2C_P -set_property -dict {PACKAGE_PIN AG16 IOSTANDARD LVDS_25 DIFF_TERM TRUE} [get_ports dac_clk_in_n] ; ## FMC1_LPC_CLK0_M2C_N -set_property -dict {PACKAGE_PIN AH28 IOSTANDARD LVDS_25} [get_ports dac_clk_out_p] ; ## FMC1_LPC_LA21_P -set_property -dict {PACKAGE_PIN AH29 IOSTANDARD LVDS_25} [get_ports dac_clk_out_n] ; ## FMC1_LPC_LA21_N -set_property -dict {PACKAGE_PIN AJ16 IOSTANDARD LVDS_25} [get_ports dac_frame_out_p] ; ## FMC1_LPC_LA11_P -set_property -dict {PACKAGE_PIN AK16 IOSTANDARD LVDS_25} [get_ports dac_frame_out_n] ; ## FMC1_LPC_LA11_N -set_property -dict {PACKAGE_PIN Y26 IOSTANDARD LVDS_25} [get_ports dac_data_out_p[0]] ; ## FMC1_LPC_LA32_P -set_property -dict {PACKAGE_PIN Y27 IOSTANDARD LVDS_25} [get_ports dac_data_out_n[0]] ; ## FMC1_LPC_LA32_N -set_property -dict {PACKAGE_PIN Y30 IOSTANDARD LVDS_25} [get_ports dac_data_out_p[1]] ; ## FMC1_LPC_LA33_P -set_property -dict {PACKAGE_PIN AA30 IOSTANDARD LVDS_25} [get_ports dac_data_out_n[1]] ; ## FMC1_LPC_LA33_N -set_property -dict {PACKAGE_PIN AB29 IOSTANDARD LVDS_25} [get_ports dac_data_out_p[2]] ; ## FMC1_LPC_LA30_P -set_property -dict {PACKAGE_PIN AB30 IOSTANDARD LVDS_25} [get_ports dac_data_out_n[2]] ; ## FMC1_LPC_LA30_N -set_property -dict {PACKAGE_PIN AD25 IOSTANDARD LVDS_25} [get_ports dac_data_out_p[3]] ; ## FMC1_LPC_LA28_P -set_property -dict {PACKAGE_PIN AE26 IOSTANDARD LVDS_25} [get_ports dac_data_out_n[3]] ; ## FMC1_LPC_LA28_N -set_property -dict {PACKAGE_PIN AC29 IOSTANDARD LVDS_25} [get_ports dac_data_out_p[4]] ; ## FMC1_LPC_LA31_P -set_property -dict {PACKAGE_PIN AD29 IOSTANDARD LVDS_25} [get_ports dac_data_out_n[4]] ; ## FMC1_LPC_LA31_N -set_property -dict {PACKAGE_PIN AE25 IOSTANDARD LVDS_25} [get_ports dac_data_out_p[5]] ; ## FMC1_LPC_LA29_P -set_property -dict {PACKAGE_PIN AF25 IOSTANDARD LVDS_25} [get_ports dac_data_out_n[5]] ; ## FMC1_LPC_LA29_N -set_property -dict {PACKAGE_PIN AF30 IOSTANDARD LVDS_25} [get_ports dac_data_out_p[6]] ; ## FMC1_LPC_LA24_P -set_property -dict {PACKAGE_PIN AG30 IOSTANDARD LVDS_25} [get_ports dac_data_out_n[6]] ; ## FMC1_LPC_LA24_N -set_property -dict {PACKAGE_PIN AF29 IOSTANDARD LVDS_25} [get_ports dac_data_out_p[7]] ; ## FMC1_LPC_LA25_P -set_property -dict {PACKAGE_PIN AG29 IOSTANDARD LVDS_25} [get_ports dac_data_out_n[7]] ; ## FMC1_LPC_LA25_N -set_property -dict {PACKAGE_PIN AK27 IOSTANDARD LVDS_25} [get_ports dac_data_out_p[8]] ; ## FMC1_LPC_LA22_P -set_property -dict {PACKAGE_PIN AK28 IOSTANDARD LVDS_25} [get_ports dac_data_out_n[8]] ; ## FMC1_LPC_LA22_N -set_property -dict {PACKAGE_PIN AJ28 IOSTANDARD LVDS_25} [get_ports dac_data_out_p[9]] ; ## FMC1_LPC_LA27_P -set_property -dict {PACKAGE_PIN AJ29 IOSTANDARD LVDS_25} [get_ports dac_data_out_n[9]] ; ## FMC1_LPC_LA27_N -set_property -dict {PACKAGE_PIN AJ30 IOSTANDARD LVDS_25} [get_ports dac_data_out_p[10]] ; ## FMC1_LPC_LA26_P -set_property -dict {PACKAGE_PIN AK30 IOSTANDARD LVDS_25} [get_ports dac_data_out_n[10]] ; ## FMC1_LPC_LA26_N -set_property -dict {PACKAGE_PIN AJ26 IOSTANDARD LVDS_25} [get_ports dac_data_out_p[11]] ; ## FMC1_LPC_LA23_P -set_property -dict {PACKAGE_PIN AK26 IOSTANDARD LVDS_25} [get_ports dac_data_out_n[11]] ; ## FMC1_LPC_LA23_N -set_property -dict {PACKAGE_PIN AH26 IOSTANDARD LVDS_25} [get_ports dac_data_out_p[12]] ; ## FMC1_LPC_LA19_P -set_property -dict {PACKAGE_PIN AH27 IOSTANDARD LVDS_25} [get_ports dac_data_out_n[12]] ; ## FMC1_LPC_LA19_N -set_property -dict {PACKAGE_PIN AG26 IOSTANDARD LVDS_25} [get_ports dac_data_out_p[13]] ; ## FMC1_LPC_LA20_P -set_property -dict {PACKAGE_PIN AG27 IOSTANDARD LVDS_25} [get_ports dac_data_out_n[13]] ; ## FMC1_LPC_LA20_N -set_property -dict {PACKAGE_PIN AB15 IOSTANDARD LVDS_25} [get_ports dac_data_out_p[14]] ; ## FMC1_LPC_LA15_P -set_property -dict {PACKAGE_PIN AB14 IOSTANDARD LVDS_25} [get_ports dac_data_out_n[14]] ; ## FMC1_LPC_LA15_N -set_property -dict {PACKAGE_PIN AE18 IOSTANDARD LVDS_25} [get_ports dac_data_out_p[15]] ; ## FMC1_LPC_LA16_P -set_property -dict {PACKAGE_PIN AE17 IOSTANDARD LVDS_25} [get_ports dac_data_out_n[15]] ; ## FMC1_LPC_LA16_N # adc -set_property -dict {PACKAGE_PIN AC28 IOSTANDARD LVDS_25 DIFF_TERM TRUE} [get_ports adc_clk_in_p] ; ## FMC1_LPC_CLK1_M2C_P -set_property -dict {PACKAGE_PIN AD28 IOSTANDARD LVDS_25 DIFF_TERM TRUE} [get_ports adc_clk_in_n] ; ## FMC1_LPC_CLK1_M2C_N -set_property -dict {PACKAGE_PIN AE13 IOSTANDARD LVDS_25 DIFF_TERM TRUE} [get_ports adc_or_in_p] ; ## FMC1_LPC_LA00_CC_P -set_property -dict {PACKAGE_PIN AF13 IOSTANDARD LVDS_25 DIFF_TERM TRUE} [get_ports adc_or_in_n] ; ## FMC1_LPC_LA00_CC_N -set_property -dict {PACKAGE_PIN AE27 IOSTANDARD LVDS_25 DIFF_TERM TRUE} [get_ports adc_data_in_p[0]] ; ## FMC1_LPC_LA18_CC_P -set_property -dict {PACKAGE_PIN AF27 IOSTANDARD LVDS_25 DIFF_TERM TRUE} [get_ports adc_data_in_n[0]] ; ## FMC1_LPC_LA18_CC_N -set_property -dict {PACKAGE_PIN AF18 IOSTANDARD LVDS_25 DIFF_TERM TRUE} [get_ports adc_data_in_p[1]] ; ## FMC1_LPC_LA14_P -set_property -dict {PACKAGE_PIN AF17 IOSTANDARD LVDS_25 DIFF_TERM TRUE} [get_ports adc_data_in_n[1]] ; ## FMC1_LPC_LA14_N -set_property -dict {PACKAGE_PIN AH17 IOSTANDARD LVDS_25 DIFF_TERM TRUE} [get_ports adc_data_in_p[2]] ; ## FMC1_LPC_LA13_P -set_property -dict {PACKAGE_PIN AH16 IOSTANDARD LVDS_25 DIFF_TERM TRUE} [get_ports adc_data_in_n[2]] ; ## FMC1_LPC_LA13_N -set_property -dict {PACKAGE_PIN AG12 IOSTANDARD LVDS_25 DIFF_TERM TRUE} [get_ports adc_data_in_p[3]] ; ## FMC1_LPC_LA03_P -set_property -dict {PACKAGE_PIN AH12 IOSTANDARD LVDS_25 DIFF_TERM TRUE} [get_ports adc_data_in_n[3]] ; ## FMC1_LPC_LA03_N -set_property -dict {PACKAGE_PIN AE16 IOSTANDARD LVDS_25 DIFF_TERM TRUE} [get_ports adc_data_in_p[4]] ; ## FMC1_LPC_LA05_P -set_property -dict {PACKAGE_PIN AE15 IOSTANDARD LVDS_25 DIFF_TERM TRUE} [get_ports adc_data_in_n[4]] ; ## FMC1_LPC_LA05_N -set_property -dict {PACKAGE_PIN AC14 IOSTANDARD LVDS_25 DIFF_TERM TRUE} [get_ports adc_data_in_p[5]] ; ## FMC1_LPC_LA10_P -set_property -dict {PACKAGE_PIN AC13 IOSTANDARD LVDS_25 DIFF_TERM TRUE} [get_ports adc_data_in_n[5]] ; ## FMC1_LPC_LA10_N -set_property -dict {PACKAGE_PIN AD16 IOSTANDARD LVDS_25 DIFF_TERM TRUE} [get_ports adc_data_in_p[6]] ; ## FMC1_LPC_LA12_P -set_property -dict {PACKAGE_PIN AD15 IOSTANDARD LVDS_25 DIFF_TERM TRUE} [get_ports adc_data_in_n[6]] ; ## FMC1_LPC_LA12_N -set_property -dict {PACKAGE_PIN AA15 IOSTANDARD LVDS_25 DIFF_TERM TRUE} [get_ports adc_data_in_p[7]] ; ## FMC1_LPC_LA07_P -set_property -dict {PACKAGE_PIN AA14 IOSTANDARD LVDS_25 DIFF_TERM TRUE} [get_ports adc_data_in_n[7]] ; ## FMC1_LPC_LA07_N -set_property -dict {PACKAGE_PIN AE12 IOSTANDARD LVDS_25 DIFF_TERM TRUE} [get_ports adc_data_in_p[8]] ; ## FMC1_LPC_LA02_P -set_property -dict {PACKAGE_PIN AF12 IOSTANDARD LVDS_25 DIFF_TERM TRUE} [get_ports adc_data_in_n[8]] ; ## FMC1_LPC_LA02_N -set_property -dict {PACKAGE_PIN AJ15 IOSTANDARD LVDS_25 DIFF_TERM TRUE} [get_ports adc_data_in_p[9]] ; ## FMC1_LPC_LA04_P -set_property -dict {PACKAGE_PIN AK15 IOSTANDARD LVDS_25 DIFF_TERM TRUE} [get_ports adc_data_in_n[9]] ; ## FMC1_LPC_LA04_N -set_property -dict {PACKAGE_PIN AH14 IOSTANDARD LVDS_25 DIFF_TERM TRUE} [get_ports adc_data_in_p[10]] ; ## FMC1_LPC_LA09_P -set_property -dict {PACKAGE_PIN AH13 IOSTANDARD LVDS_25 DIFF_TERM TRUE} [get_ports adc_data_in_n[10]] ; ## FMC1_LPC_LA09_N -set_property -dict {PACKAGE_PIN AD14 IOSTANDARD LVDS_25 DIFF_TERM TRUE} [get_ports adc_data_in_p[11]] ; ## FMC1_LPC_LA08_P -set_property -dict {PACKAGE_PIN AD13 IOSTANDARD LVDS_25 DIFF_TERM TRUE} [get_ports adc_data_in_n[11]] ; ## FMC1_LPC_LA08_N -set_property -dict {PACKAGE_PIN AB12 IOSTANDARD LVDS_25 DIFF_TERM TRUE} [get_ports adc_data_in_p[12]] ; ## FMC1_LPC_LA06_P -set_property -dict {PACKAGE_PIN AC12 IOSTANDARD LVDS_25 DIFF_TERM TRUE} [get_ports adc_data_in_n[12]] ; ## FMC1_LPC_LA06_N -set_property -dict {PACKAGE_PIN AF15 IOSTANDARD LVDS_25 DIFF_TERM TRUE} [get_ports adc_data_in_p[13]] ; ## FMC1_LPC_LA01_CC_P -set_property -dict {PACKAGE_PIN AG15 IOSTANDARD LVDS_25 DIFF_TERM TRUE} [get_ports adc_data_in_n[13]] ; ## FMC1_LPC_LA01_CC_N +set_property -dict {PACKAGE_PIN AE13 IOSTANDARD LVDS_25 DIFF_TERM TRUE} [get_ports adc_clk_in_p] ; ## G06 FMC_LPC_LA00_CC_P +set_property -dict {PACKAGE_PIN AF13 IOSTANDARD LVDS_25 DIFF_TERM TRUE} [get_ports adc_clk_in_n] ; ## G07 FMC_LPC_LA00_CC_N +set_property -dict {PACKAGE_PIN AH26 IOSTANDARD LVDS_25 DIFF_TERM TRUE} [get_ports adc_or_in_p] ; ## H22 FMC_LPC_LA19_P +set_property -dict {PACKAGE_PIN AH27 IOSTANDARD LVDS_25 DIFF_TERM TRUE} [get_ports adc_or_in_n] ; ## H23 FMC_LPC_LA19_N +set_property -dict {PACKAGE_PIN AF15 IOSTANDARD LVDS_25 DIFF_TERM TRUE} [get_ports adc_data_in_p[0]] ; ## D08 FMC_LPC_LA01_CC_P +set_property -dict {PACKAGE_PIN AG15 IOSTANDARD LVDS_25 DIFF_TERM TRUE} [get_ports adc_data_in_n[0]] ; ## D09 FMC_LPC_LA01_CC_N +set_property -dict {PACKAGE_PIN AE12 IOSTANDARD LVDS_25 DIFF_TERM TRUE} [get_ports adc_data_in_p[1]] ; ## H07 FMC_LPC_LA02_P +set_property -dict {PACKAGE_PIN AF12 IOSTANDARD LVDS_25 DIFF_TERM TRUE} [get_ports adc_data_in_n[1]] ; ## H08 FMC_LPC_LA02_N +set_property -dict {PACKAGE_PIN AG12 IOSTANDARD LVDS_25 DIFF_TERM TRUE} [get_ports adc_data_in_p[2]] ; ## G09 FMC_LPC_LA03_P +set_property -dict {PACKAGE_PIN AH12 IOSTANDARD LVDS_25 DIFF_TERM TRUE} [get_ports adc_data_in_n[2]] ; ## G10 FMC_LPC_LA03_N +set_property -dict {PACKAGE_PIN AJ15 IOSTANDARD LVDS_25 DIFF_TERM TRUE} [get_ports adc_data_in_p[3]] ; ## H10 FMC_LPC_LA04_P +set_property -dict {PACKAGE_PIN AK15 IOSTANDARD LVDS_25 DIFF_TERM TRUE} [get_ports adc_data_in_n[3]] ; ## H11 FMC_LPC_LA04_N +set_property -dict {PACKAGE_PIN AE16 IOSTANDARD LVDS_25 DIFF_TERM TRUE} [get_ports adc_data_in_p[4]] ; ## D11 FMC_LPC_LA05_P +set_property -dict {PACKAGE_PIN AE15 IOSTANDARD LVDS_25 DIFF_TERM TRUE} [get_ports adc_data_in_n[4]] ; ## D12 FMC_LPC_LA05_N +set_property -dict {PACKAGE_PIN AB12 IOSTANDARD LVDS_25 DIFF_TERM TRUE} [get_ports adc_data_in_p[5]] ; ## C10 FMC_LPC_LA06_P +set_property -dict {PACKAGE_PIN AC12 IOSTANDARD LVDS_25 DIFF_TERM TRUE} [get_ports adc_data_in_n[5]] ; ## C11 FMC_LPC_LA06_N +set_property -dict {PACKAGE_PIN AA15 IOSTANDARD LVDS_25 DIFF_TERM TRUE} [get_ports adc_data_in_p[6]] ; ## H13 FMC_LPC_LA07_P +set_property -dict {PACKAGE_PIN AA14 IOSTANDARD LVDS_25 DIFF_TERM TRUE} [get_ports adc_data_in_n[6]] ; ## H14 FMC_LPC_LA07_N +set_property -dict {PACKAGE_PIN AD14 IOSTANDARD LVDS_25 DIFF_TERM TRUE} [get_ports adc_data_in_p[7]] ; ## G12 FMC_LPC_LA08_P +set_property -dict {PACKAGE_PIN AD13 IOSTANDARD LVDS_25 DIFF_TERM TRUE} [get_ports adc_data_in_n[7]] ; ## G13 FMC_LPC_LA08_N +set_property -dict {PACKAGE_PIN AH14 IOSTANDARD LVDS_25 DIFF_TERM TRUE} [get_ports adc_data_in_p[8]] ; ## D14 FMC_LPC_LA09_P +set_property -dict {PACKAGE_PIN AH13 IOSTANDARD LVDS_25 DIFF_TERM TRUE} [get_ports adc_data_in_n[8]] ; ## D15 FMC_LPC_LA09_N +set_property -dict {PACKAGE_PIN AC14 IOSTANDARD LVDS_25 DIFF_TERM TRUE} [get_ports adc_data_in_p[9]] ; ## C14 FMC_LPC_LA10_P +set_property -dict {PACKAGE_PIN AC13 IOSTANDARD LVDS_25 DIFF_TERM TRUE} [get_ports adc_data_in_n[9]] ; ## C15 FMC_LPC_LA10_N +set_property -dict {PACKAGE_PIN AJ16 IOSTANDARD LVDS_25 DIFF_TERM TRUE} [get_ports adc_data_in_p[10]] ; ## H16 FMC_LPC_LA11_P +set_property -dict {PACKAGE_PIN AK16 IOSTANDARD LVDS_25 DIFF_TERM TRUE} [get_ports adc_data_in_n[10]] ; ## H17 FMC_LPC_LA11_N +set_property -dict {PACKAGE_PIN AD16 IOSTANDARD LVDS_25 DIFF_TERM TRUE} [get_ports adc_data_in_p[11]] ; ## G15 FMC_LPC_LA12_P +set_property -dict {PACKAGE_PIN AD15 IOSTANDARD LVDS_25 DIFF_TERM TRUE} [get_ports adc_data_in_n[11]] ; ## G16 FMC_LPC_LA12_N +set_property -dict {PACKAGE_PIN AH17 IOSTANDARD LVDS_25 DIFF_TERM TRUE} [get_ports adc_data_in_p[12]] ; ## D17 FMC_LPC_LA13_P +set_property -dict {PACKAGE_PIN AH16 IOSTANDARD LVDS_25 DIFF_TERM TRUE} [get_ports adc_data_in_n[12]] ; ## D18 FMC_LPC_LA13_N +set_property -dict {PACKAGE_PIN AF18 IOSTANDARD LVDS_25 DIFF_TERM TRUE} [get_ports adc_data_in_p[13]] ; ## C18 FMC_LPC_LA14_P +set_property -dict {PACKAGE_PIN AF17 IOSTANDARD LVDS_25 DIFF_TERM TRUE} [get_ports adc_data_in_n[13]] ; ## C19 FMC_LPC_LA14_N +set_property -dict {PACKAGE_PIN AB15 IOSTANDARD LVDS_25 DIFF_TERM TRUE} [get_ports adc_data_in_p[14]] ; ## H19 FMC_LPC_LA15_P +set_property -dict {PACKAGE_PIN AB14 IOSTANDARD LVDS_25 DIFF_TERM TRUE} [get_ports adc_data_in_n[14]] ; ## H20 FMC_LPC_LA15_N +set_property -dict {PACKAGE_PIN AE18 IOSTANDARD LVDS_25 DIFF_TERM TRUE} [get_ports adc_data_in_p[15]] ; ## G18 FMC_LPC_LA16_P +set_property -dict {PACKAGE_PIN AE17 IOSTANDARD LVDS_25 DIFF_TERM TRUE} [get_ports adc_data_in_n[15]] ; ## G19 FMC_LPC_LA16_N + +# spi + +set_property -dict {PACKAGE_PIN AK27 IOSTANDARD LVCMOS25} [get_ports spi_ad9517_csn] ; ## G24 FMC_LPC_LA22_P +set_property -dict {PACKAGE_PIN AH28 IOSTANDARD LVCMOS25} [get_ports spi_ad9652_csn] ; ## H25 FMC_LPC_LA21_P +set_property -dict {PACKAGE_PIN AH29 IOSTANDARD LVCMOS25} [get_ports spi_adf4351_csn] ; ## H26 FMC_LPC_LA21_N +set_property -dict {PACKAGE_PIN AJ26 IOSTANDARD LVCMOS25} [get_ports spi_clk] ; ## D23 FMC_LPC_LA23_P +set_property -dict {PACKAGE_PIN AK28 IOSTANDARD LVCMOS25} [get_ports spi_sdio] ; ## G25 FMC_LPC_LA22_N + +# gpio + +set_property -dict {PACKAGE_PIN AK26 IOSTANDARD LVCMOS25} [get_ports adf4351_ld] ; ## D24 FMC_LPC_LA23_N # clocks -create_clock -name dac_clk_in -period 2.00 [get_ports dac_clk_in_p] -create_clock -name adc_clk_in -period 4.00 [get_ports adc_clk_in_p] -create_clock -name dac_div_clk -period 8.00 [get_pins i_system_wrapper/system_i/axi_ad9122/dac_div_clk] -create_clock -name adc_clk -period 4.00 [get_pins i_system_wrapper/system_i/axi_ad9643/adc_clk] +create_clock -name adc_clk_in -period 3.22 [get_ports adc_clk_in_p] +create_clock -name adc_clk -period 3.22 [get_pins i_system_wrapper/system_i/axi_ad9652/adc_clk] create_clock -name fmc_dma_clk -period 8.00 [get_pins i_system_wrapper/system_i/sys_ps7/FCLK_CLK2] -set_clock_groups -asynchronous -group {dac_div_clk} set_clock_groups -asynchronous -group {adc_clk} set_clock_groups -asynchronous -group {fmc_dma_clk} diff --git a/projects/fmcomms6/zc706/system_project.tcl b/projects/fmcomms6/zc706/system_project.tcl index b3c958840..2fbbc6434 100644 --- a/projects/fmcomms6/zc706/system_project.tcl +++ b/projects/fmcomms6/zc706/system_project.tcl @@ -4,12 +4,14 @@ source ../../scripts/adi_env.tcl source $ad_hdl_dir/projects/scripts/adi_project.tcl -adi_project_create fmcomms1_zc706 -adi_project_files fmcomms1_zc706 [list \ +adi_project_create fmcomms6_zc706 +adi_project_files fmcomms6_zc706 [list \ + "../common/fmcomms6_spi.v" \ "system_top.v" \ "system_constr.xdc"\ + "$ad_hdl_dir/library/common/ad_iobuf.v" \ "$ad_hdl_dir/projects/common/zc706/zc706_system_constr.xdc" ] -adi_project_run fmcomms1_zc706 +adi_project_run fmcomms6_zc706 diff --git a/projects/fmcomms6/zc706/system_top.v b/projects/fmcomms6/zc706/system_top.v index f7bc70495..537272be9 100644 --- a/projects/fmcomms6/zc706/system_top.v +++ b/projects/fmcomms6/zc706/system_top.v @@ -74,14 +74,8 @@ module system_top ( spdif, - dac_clk_in_p, - dac_clk_in_n, - dac_clk_out_p, - dac_clk_out_n, - dac_frame_out_p, - dac_frame_out_n, - dac_data_out_p, - dac_data_out_n, + iic_scl, + iic_sda, adc_clk_in_p, adc_clk_in_n, @@ -90,11 +84,12 @@ module system_top ( adc_data_in_p, adc_data_in_n, - ref_clk_out_p, - ref_clk_out_n, - - iic_scl, - iic_sda); + spi_adf4351_csn, + spi_ad9652_csn, + spi_ad9517_csn, + spi_clk, + spi_sdio, + adf4351_ld); inout [14:0] DDR_addr; inout [ 2:0] DDR_ba; @@ -129,48 +124,34 @@ module system_top ( output spdif; - input dac_clk_in_p; - input dac_clk_in_n; - output dac_clk_out_p; - output dac_clk_out_n; - output dac_frame_out_p; - output dac_frame_out_n; - output [15:0] dac_data_out_p; - output [15:0] dac_data_out_n; + inout iic_scl; + inout iic_sda; input adc_clk_in_p; input adc_clk_in_n; input adc_or_in_p; input adc_or_in_n; - input [13:0] adc_data_in_p; - input [13:0] adc_data_in_n; + input [15:0] adc_data_in_p; + input [15:0] adc_data_in_n; - output ref_clk_out_p; - output ref_clk_out_n; - - inout iic_scl; - inout iic_sda; + output spi_adf4351_csn; + output spi_ad9652_csn; + output spi_ad9517_csn; + output spi_clk; + inout spi_sdio; + inout adf4351_ld; // internal registers - reg [63:0] dac_ddata_0 = 'd0; - reg [63:0] dac_ddata_1 = 'd0; - reg dac_dma_rd = 'd0; reg [ 1:0] adc_data_cnt = 'd0; reg adc_dma_wr = 'd0; reg [63:0] adc_dma_wdata = 'd0; // internal signals - wire [31:0] gpio_i; - wire [31:0] gpio_o; - wire [31:0] gpio_t; - wire dac_clk; - wire dac_valid_0; - wire dac_enable_0; - wire dac_valid_1; - wire dac_enable_1; - wire [63:0] dac_dma_rdata; + wire [16:0] gpio_i; + wire [16:0] gpio_o; + wire [16:0] gpio_t; wire adc_clk; wire adc_valid_0; wire adc_enable_0; @@ -178,51 +159,8 @@ module system_top ( wire adc_valid_1; wire adc_enable_1; wire [15:0] adc_data_1; - wire ref_clk; - wire oddr_ref_clk; - // instantiations - - ODDR #( - .DDR_CLK_EDGE ("SAME_EDGE"), - .INIT (1'b0), - .SRTYPE ("ASYNC")) - i_oddr_ref_clk ( - .S (1'b0), - .CE (1'b1), - .R (1'b0), - .C (ref_clk), - .D1 (1'b1), - .D2 (1'b0), - .Q (oddr_ref_clk)); - - OBUFDS i_obufds_ref_clk ( - .I (oddr_ref_clk), - .O (ref_clk_out_p), - .OB (ref_clk_out_n)); - - genvar n; - generate - for (n = 0; n <= 14; n = n + 1) begin: g_iobuf_gpio_bd - IOBUF i_iobuf_gpio_bd ( - .I (gpio_o[n]), - .O (gpio_i[n]), - .T (gpio_t[n]), - .IO (gpio_bd[n])); - end - endgenerate - - always @(posedge dac_clk) begin - dac_dma_rd <= dac_valid_0 & dac_enable_0; - dac_ddata_1[63:48] <= dac_dma_rdata[63:48]; - dac_ddata_1[47:32] <= dac_dma_rdata[63:48]; - dac_ddata_1[31:16] <= dac_dma_rdata[31:16]; - dac_ddata_1[15: 0] <= dac_dma_rdata[31:16]; - dac_ddata_0[63:48] <= dac_dma_rdata[47:32]; - dac_ddata_0[47:32] <= dac_dma_rdata[47:32]; - dac_ddata_0[31:16] <= dac_dma_rdata[15: 0]; - dac_ddata_0[15: 0] <= dac_dma_rdata[15: 0]; - end + // pack-unpack place holder always @(posedge adc_clk) begin adc_data_cnt <= adc_data_cnt + 1'b1; @@ -242,6 +180,21 @@ module system_top ( endcase end + // instantiations + + ad_iobuf #(.DATA_WIDTH(16)) i_iobuf ( + .dt (gpio_t[15:0]), + .di (gpio_o[15:0]), + .do (gpio_i[15:0]), + .dio ({adf4351_ld, gpio_bd})); + + fmcomms6_spi i_spi ( + .spi_csn ({spi_adf4351_csn, spi_ad9652_csn, spi_ad9517_csn}), + .spi_clk (spi_clk), + .spi_mosi (spi_mosi), + .spi_miso (spi_miso), + .spi_sdio (spi_sdio)); + system_wrapper i_system_wrapper ( .DDR_addr (DDR_addr), .DDR_ba (DDR_ba), @@ -283,23 +236,6 @@ module system_top ( .adc_or_in_p (adc_or_in_p), .adc_valid_0 (adc_valid_0), .adc_valid_1 (adc_valid_1), - .dac_clk (dac_clk), - .dac_clk_in_n (dac_clk_in_n), - .dac_clk_in_p (dac_clk_in_p), - .dac_clk_out_n (dac_clk_out_n), - .dac_clk_out_p (dac_clk_out_p), - .dac_data_out_n (dac_data_out_n), - .dac_data_out_p (dac_data_out_p), - .dac_ddata_0 (dac_ddata_0), - .dac_ddata_1 (dac_ddata_1), - .dac_dma_rd (dac_dma_rd), - .dac_dma_rdata (dac_dma_rdata), - .dac_enable_0 (dac_enable_0), - .dac_enable_1 (dac_enable_1), - .dac_frame_out_n (dac_frame_out_n), - .dac_frame_out_p (dac_frame_out_p), - .dac_valid_0 (dac_valid_0), - .dac_valid_1 (dac_valid_1), .hdmi_data (hdmi_data), .hdmi_data_e (hdmi_data_e), .hdmi_hsync (hdmi_hsync), @@ -307,8 +243,16 @@ module system_top ( .hdmi_vsync (hdmi_vsync), .iic_main_scl_io (iic_scl), .iic_main_sda_io (iic_sda), - .ref_clk (ref_clk), - .spdif (spdif)); + .spdif (spdif), + .spi_clk_i (spi_clk), + .spi_clk_o (spi_clk), + .spi_csn_0_o (spi_ad9517_csn), + .spi_csn_1_o (spi_ad9652_csn), + .spi_csn_2_o (spi_adf4351_csn), + .spi_csn_i (1'b1), + .spi_sdi_i (spi_miso), + .spi_sdo_i (spi_mosi), + .spi_sdo_o (spi_mosi)); endmodule