diff --git a/library/axi_ad9361/axi_ad9361.v b/library/axi_ad9361/axi_ad9361.v index c012694d7..1b72522b0 100644 --- a/library/axi_ad9361/axi_ad9361.v +++ b/library/axi_ad9361/axi_ad9361.v @@ -43,6 +43,7 @@ module axi_ad9361 #( parameter MODE_1R1T = 0, parameter DEVICE_TYPE = 0, parameter TDD_DISABLE = 0, + parameter PPS_RECEIVER_ENABLE = 0, parameter CMOS_OR_LVDS_N = 0, parameter ADC_INIT_DELAY = 0, parameter ADC_DATAPATH_DISABLE = 0, @@ -284,6 +285,7 @@ module axi_ad9361 #( wire up_drp_locked; wire [31:0] up_pps_rcounter_s; + wire up_pps_status_s; wire up_irq_mask_s; wire adc_up_pps_irq_mask_s; wire dac_up_pps_irq_mask_s; @@ -535,23 +537,36 @@ module axi_ad9361 #( end endgenerate - // GPS's 1PPS receiver - ad_pps_receiver i_pps_receiver ( - .clk (clk), - .rst (rst), - .gps_pps (gps_pps), - .up_clk (up_clk), - .up_rstn (up_rstn), - .up_pps_rcounter (up_pps_rcounter_s), - .up_irq_mask (up_irq_mask_s), - .up_irq (gps_pps_irq)); - assign up_irq_mask_s = adc_up_pps_irq_mask_s | dac_up_pps_irq_mask_s; + generate if (PPS_RECEIVER_ENABLE == 1) begin + // GPS's PPS receiver + ad_pps_receiver i_pps_receiver ( + .clk (clk), + .rst (rst), + .gps_pps (gps_pps), + .up_clk (up_clk), + .up_rstn (up_rstn), + .up_pps_rcounter (up_pps_rcounter_s), + .up_pps_status (up_pps_status_s), + .up_irq_mask (up_irq_mask_s), + .up_irq (gps_pps_irq)); + assign up_irq_mask_s = adc_up_pps_irq_mask_s | dac_up_pps_irq_mask_s; + end + endgenerate + + generate if (PPS_RECEIVER_ENABLE == 0) begin + assign up_pps_rcounter_s = 32'b0; + assign up_pps_status_s = 1'b1; + assign gps_pps_irq = 1'b0; + end + endgenerate // receive axi_ad9361_rx #( .ID (ID), .MODE_1R1T (MODE_1R1T), + .CMOS_OR_LVDS_N (CMOS_OR_LVDS_N), + .PPS_RECEIVER_ENABLE (PPS_RECEIVER_ENABLE), .INIT_DELAY (ADC_INIT_DELAY), .USERPORTS_DISABLE (ADC_USERPORTS_DISABLE_INT), .DATAFORMAT_DISABLE (ADC_DATAFORMAT_DISABLE_INT), @@ -561,6 +576,7 @@ module axi_ad9361 #( .mmcm_rst (mmcm_rst), .adc_rst (rst), .adc_clk (clk), + .adc_valid (adc_valid_s), .adc_data (adc_data_s), .adc_status (adc_status_s), @@ -589,7 +605,8 @@ module axi_ad9361 #( .adc_dunf (adc_dunf), .up_adc_gpio_in (up_adc_gpio_in), .up_adc_gpio_out (up_adc_gpio_out), - .up_pps_rcounter(up_pps_rcounter_s), + .up_pps_rcounter (up_pps_rcounter_s), + .up_pps_status (up_pps_status_s), .up_pps_irq_mask (adc_up_pps_irq_mask_s), .up_rstn (up_rstn), .up_clk (up_clk), @@ -614,6 +631,8 @@ module axi_ad9361 #( axi_ad9361_tx #( .ID (ID), .MODE_1R1T (MODE_1R1T), + .CMOS_OR_LVDS_N (CMOS_OR_LVDS_N), + .PPS_RECEIVER_ENABLE (PPS_RECEIVER_ENABLE), .INIT_DELAY (DAC_INIT_DELAY), .DDS_DISABLE (DAC_DDS_DISABLE_INT), .USERPORTS_DISABLE (DAC_USERPORTS_DISABLE_INT), @@ -648,7 +667,8 @@ module axi_ad9361 #( .dac_data_q1 (dac_data_q1), .dac_dovf(dac_dovf), .dac_dunf(dac_dunf), - .up_pps_rcounter(up_pps_rcounter_s), + .up_pps_rcounter (up_pps_rcounter_s), + .up_pps_status (up_pps_status_s), .up_pps_irq_mask (dac_up_pps_irq_mask_s), .up_dac_gpio_in (up_dac_gpio_in), .up_dac_gpio_out (up_dac_gpio_out), diff --git a/library/axi_ad9361/axi_ad9361_constr.xdc b/library/axi_ad9361/axi_ad9361_constr.xdc index a5de42b3d..3c5d9b2d5 100644 --- a/library/axi_ad9361/axi_ad9361_constr.xdc +++ b/library/axi_ad9361/axi_ad9361_constr.xdc @@ -9,8 +9,11 @@ set_false_path -from [get_cells -hier -filter {name =~ *up_txnrx_int_reg && I set_false_path -to [get_cells -hier -filter {name =~ *tdd_sync_d1_reg && IS_SEQUENTIAL}] set_property ASYNC_REG TRUE \ - [get_cells -hier *_pps_m*] + [get_cells -hier *_pps_m*] \ + [get_cells -hier *_pps_status_m*] set_false_path -to [get_cells -hier -filter {name =~ *_pps_m_reg[0] && IS_SEQUENTIAL}] +set_false_path -from [get_cells -hier -filter {name =~ *pps_status_reg && IS_SEQUENTIAL}] \ + -to [get_cells -hier -filter {name =~ *up_pps_status_m_reg && IS_SEQUENTIAL}] set_false_path -to [get_cells -hier -filter {name =~ *up_pps_rcounter_reg* && IS_SEQUENTIAL}] diff --git a/library/axi_ad9361/axi_ad9361_rx.v b/library/axi_ad9361/axi_ad9361_rx.v index fe42920f2..167a12261 100644 --- a/library/axi_ad9361/axi_ad9361_rx.v +++ b/library/axi_ad9361/axi_ad9361_rx.v @@ -42,6 +42,8 @@ module axi_ad9361_rx #( parameter ID = 0, parameter MODE_1R1T = 0, + parameter CMOS_OR_LVDS_N = 0, + parameter PPS_RECEIVER_ENABLE = 0, parameter INIT_DELAY = 0, parameter USERPORTS_DISABLE = 0, parameter DATAFORMAT_DISABLE = 0, @@ -97,6 +99,7 @@ module axi_ad9361_rx #( // 1PPS reporting counter and interrupt input [31:0] up_pps_rcounter, + input up_pps_status, output up_pps_irq_mask, // processor interface @@ -124,7 +127,9 @@ module axi_ad9361_rx #( // configuration settings - localparam CONFIG = (MODE_1R1T * 16) + + localparam CONFIG = (PPS_RECEIVER_ENABLE * 256) + + (CMOS_OR_LVDS_N * 128) + + (MODE_1R1T * 16) + (USERPORTS_DISABLE * 8) + (DATAFORMAT_DISABLE * 4) + (DCFILTER_DISABLE * 2) + @@ -349,6 +354,7 @@ module axi_ad9361_rx #( .adc_sync (), .up_adc_ce (), .up_pps_rcounter (up_pps_rcounter), + .up_pps_status (up_pps_status), .up_pps_irq_mask (up_pps_irq_mask), .up_status_pn_err (up_status_pn_err), .up_status_pn_oos (up_status_pn_oos), diff --git a/library/axi_ad9361/axi_ad9361_tx.v b/library/axi_ad9361/axi_ad9361_tx.v index c4fff7cb5..c6f55963e 100644 --- a/library/axi_ad9361/axi_ad9361_tx.v +++ b/library/axi_ad9361/axi_ad9361_tx.v @@ -41,6 +41,8 @@ module axi_ad9361_tx #( parameter ID = 0, parameter MODE_1R1T = 0, + parameter CMOS_OR_LVDS_N = 0, + parameter PPS_RECEIVER_ENABLE = 0, parameter INIT_DELAY = 0, parameter DDS_DISABLE = 0, parameter USERPORTS_DISABLE = 0, @@ -95,6 +97,7 @@ module axi_ad9361_tx #( // 1PPS reporting counter and interrupt input [31:0] up_pps_rcounter, + input up_pps_status, output up_pps_irq_mask, // processor interface @@ -112,7 +115,9 @@ module axi_ad9361_tx #( // configuration settings - localparam CONFIG = (DDS_DISABLE * 64) + + localparam CONFIG = (PPS_RECEIVER_ENABLE * 256) + + (CMOS_OR_LVDS_N * 128) + + (DDS_DISABLE * 64) + (DELAYCNTRL_DISABLE * 32) + (MODE_1R1T * 16) + (USERPORTS_DISABLE * 8) + @@ -351,6 +356,7 @@ module axi_ad9361_tx #( .dac_clk_ratio (32'd1), .up_dac_ce (), .up_pps_rcounter (up_pps_rcounter), + .up_pps_status (up_pps_status), .up_pps_irq_mask (up_pps_irq_mask), .up_drp_sel (), .up_drp_wr (), diff --git a/library/common/ad_pps_receiver.v b/library/common/ad_pps_receiver.v index ca8117f27..5ad77df5b 100644 --- a/library/common/ad_pps_receiver.v +++ b/library/common/ad_pps_receiver.v @@ -42,6 +42,7 @@ module ad_pps_receiver ( input up_clk, input up_rstn, output reg [31:0] up_pps_rcounter, + output reg up_pps_status, input up_irq_mask, output reg up_irq); @@ -52,9 +53,11 @@ module ad_pps_receiver ( reg [ 2:0] gps_pps_m = 3'b0; reg [ 2:0] up_pps_m = 3'b0; + reg up_pps_status_m = 1'b0; reg pps_toggle = 1'b0; reg [31:0] free_rcounter = 32'b0; reg [31:0] pps_rcounter = 32'b0; + reg pps_status = 1'b0; wire pps_posedge_s; wire up_pps_posedge_s; @@ -74,11 +77,16 @@ module ad_pps_receiver ( if (rst == 1'b1) begin free_rcounter <= 32'b0; pps_rcounter <= 32'b0; + pps_status <= 1'b1; end else if (pps_posedge_s == 1'b1) begin free_rcounter <= 32'b0; pps_rcounter <= free_rcounter; + pps_status <= 1'b0; end else begin free_rcounter <= free_rcounter + 32'b1; + if (free_rcounter[28] == 1'b1) begin + pps_status <= 1'b1; + end end end @@ -96,8 +104,12 @@ module ad_pps_receiver ( if (up_rstn == 1'b0) begin up_pps_m <= 3'b0; up_pps_rcounter <= 1'b0; + up_pps_status_m <= 1'b1; + up_pps_status <= 1'b1; end else begin up_pps_m <= {up_pps_m[1:0], pps_toggle}; + up_pps_status_m <= pps_status; + up_pps_status <= up_pps_status_m; if ((up_pps_m[2] ^ up_pps_m[1]) == 1'b1) begin up_pps_rcounter <= pps_rcounter; end diff --git a/library/common/up_adc_common.v b/library/common/up_adc_common.v index feb849564..bdf6abb1a 100644 --- a/library/common/up_adc_common.v +++ b/library/common/up_adc_common.v @@ -67,6 +67,7 @@ module up_adc_common #( output adc_sref_sync, output adc_sync, input [31:0] up_pps_rcounter, + input up_pps_status, output reg up_pps_irq_mask, // channel interface @@ -375,6 +376,7 @@ module up_adc_common #( 8'h2e: up_rdata_int <= up_adc_gpio_in; 8'h2f: up_rdata_int <= up_adc_gpio_out_int; 8'h30: up_rdata_int <= up_pps_rcounter; + 8'h31: up_rdata_int <= {31'b0, up_pps_status}; default: up_rdata_int <= 0; endcase end else begin diff --git a/library/common/up_dac_common.v b/library/common/up_dac_common.v index af3fd5ee9..88e4d1799 100644 --- a/library/common/up_dac_common.v +++ b/library/common/up_dac_common.v @@ -68,6 +68,7 @@ module up_dac_common #( input [31:0] dac_clk_ratio, output up_dac_ce, input [31:0] up_pps_rcounter, + input up_pps_status, output reg up_pps_irq_mask, // drp interface @@ -378,6 +379,7 @@ module up_dac_common #( 8'h2e: up_rdata_int <= up_dac_gpio_in; 8'h2f: up_rdata_int <= up_dac_gpio_out_int; 8'h30: up_rdata_int <= up_pps_rcounter; + 8'h31: up_rdata_int <= up_pps_status; default: up_rdata_int <= 0; endcase end else begin diff --git a/projects/adrv9361z7035/common/ccbox_bd.tcl b/projects/adrv9361z7035/common/ccbox_bd.tcl index 82aada665..9f114ad66 100644 --- a/projects/adrv9361z7035/common/ccbox_bd.tcl +++ b/projects/adrv9361z7035/common/ccbox_bd.tcl @@ -11,6 +11,10 @@ set_property CONFIG.PCW_UART0_UART0_IO {MIO 14 .. 15} [get_bd_cells sys_ps7] set_property CONFIG.PCW_USE_DMA0 1 [get_bd_cells sys_ps7] set_property CONFIG.PCW_USE_DMA1 1 [get_bd_cells sys_ps7] +# enable PPS receiver + +ad_ip_parameter axi_ad9361 CONFIG.PPS_RECEIVER_ENABLE 1 + # i2s create_bd_port -dir O -type clk i2s_mclk diff --git a/projects/adrv9364z7020/common/ccbox_bd.tcl b/projects/adrv9364z7020/common/ccbox_bd.tcl index 82aada665..9f114ad66 100644 --- a/projects/adrv9364z7020/common/ccbox_bd.tcl +++ b/projects/adrv9364z7020/common/ccbox_bd.tcl @@ -11,6 +11,10 @@ set_property CONFIG.PCW_UART0_UART0_IO {MIO 14 .. 15} [get_bd_cells sys_ps7] set_property CONFIG.PCW_USE_DMA0 1 [get_bd_cells sys_ps7] set_property CONFIG.PCW_USE_DMA1 1 [get_bd_cells sys_ps7] +# enable PPS receiver + +ad_ip_parameter axi_ad9361 CONFIG.PPS_RECEIVER_ENABLE 1 + # i2s create_bd_port -dir O -type clk i2s_mclk