diff --git a/library/util_axis_resize/Makefile b/library/util_axis_resize/Makefile
index e14da3133..8b1cd90aa 100644
--- a/library/util_axis_resize/Makefile
+++ b/library/util_axis_resize/Makefile
@@ -8,30 +8,7 @@
 M_DEPS := util_axis_resize_ip.tcl
 M_DEPS += ../scripts/adi_env.tcl
 M_DEPS += ../scripts/adi_ip.tcl
-M_DEPS += 
-M_DEPS += adi_ip_properties_liteutil_axis_resize
-M_DEPS += 
-M_DEPS += adi_add_buss_axisslave
-M_DEPS += xilinx.com:interface:axis_rtl:1.0
-M_DEPS += xilinx.com:interface:axis:1.0
-M_DEPS += {
-M_DEPS += {s_validTVALID}
-M_DEPS += {s_readyTREADY}
-M_DEPS += {s_dataTDATA}
-M_DEPS += }
-M_DEPS += 
-M_DEPS += adi_add_busm_axismaster
-M_DEPS += xilinx.com:interface:axis_rtl:1.0
-M_DEPS += xilinx.com:interface:axis:1.0
-M_DEPS += {
-M_DEPS += {m_validTVALID}
-M_DEPS += {m_readyTREADY}
-M_DEPS += {m_dataTDATA}
-M_DEPS += }
-M_DEPS += 
-M_DEPS += adi_add_bus_clockclks_axis:m_axisresetn
-M_DEPS += 
-M_DEPS += ipx::save_core[ipx::current_core
+M_DEPS += util_axis_resize.v
 
 M_VIVADO := vivado -mode batch -source