diff --git a/projects/daq3/common/daq3_bd.tcl b/projects/daq3/common/daq3_bd.tcl
index 59347bd53..1e55dea89 100644
--- a/projects/daq3/common/daq3_bd.tcl
+++ b/projects/daq3/common/daq3_bd.tcl
@@ -63,11 +63,6 @@ if {$sys_zynq == 0} {
   set adc_dsync       [create_bd_port -dir I adc_dsync]
   set adc_ddata       [create_bd_port -dir I -from 127 -to 0 adc_ddata]
 
-  set axi_ad9152_dma_intr [create_bd_port -dir O axi_ad9152_dma_intr]
-  set axi_ad9680_dma_intr [create_bd_port -dir O axi_ad9680_dma_intr]
-  set axi_daq3_spi_intr   [create_bd_port -dir O axi_daq3_spi_intr  ]  
-  set axi_daq3_gpio_intr  [create_bd_port -dir O axi_daq3_gpio_intr ] 
-
   # dac peripherals
 
   set axi_ad9152_core [create_bd_cell -type ip -vlnv analog.com:user:axi_ad9152:1.0 axi_ad9152_core]
@@ -262,7 +257,6 @@ if {$sys_zynq == 0} {
   connect_bd_net -net axi_ad9152_dac_drd            [get_bd_ports dac_drd]                      [get_bd_pins axi_ad9152_dma/fifo_rd_en]
   connect_bd_net -net axi_ad9152_dac_ddata          [get_bd_ports dac_ddata]                    [get_bd_pins axi_ad9152_dma/fifo_rd_dout]
   connect_bd_net -net axi_ad9152_dac_dunf           [get_bd_pins axi_ad9152_core/dac_dunf]      [get_bd_pins axi_ad9152_dma/fifo_rd_underflow]
-  connect_bd_net -net axi_ad9152_dma_intr           [get_bd_pins axi_ad9152_dma/irq]            [get_bd_ports axi_ad9152_dma_intr]
 
   # connections (adc)
 
@@ -302,7 +296,6 @@ if {$sys_zynq == 0} {
   connect_bd_net -net axi_ad9680_dma_ddata          [get_bd_pins axi_ad9680_fifo/dma_wdata]     [get_bd_pins axi_ad9680_dma/s_axis_data]
   connect_bd_net -net axi_ad9680_dma_dready         [get_bd_pins axi_ad9680_fifo/dma_wready]    [get_bd_pins axi_ad9680_dma/s_axis_ready]
   connect_bd_net -net axi_ad9680_dma_xfer_req       [get_bd_pins axi_ad9680_fifo/dma_xfer_req]  [get_bd_pins axi_ad9680_dma/s_axis_xfer_req]
-  connect_bd_net -net axi_ad9680_dma_intr           [get_bd_pins axi_ad9680_dma/irq]            [get_bd_ports axi_ad9680_dma_intr]
 
   # dac/adc clocks
 
@@ -360,9 +353,26 @@ if {$sys_zynq == 0} {
   connect_bd_net -net sys_100m_resetn [get_bd_pins axi_cpu_interconnect/M15_ARESETN] $sys_100m_resetn_source
   connect_bd_net -net sys_100m_resetn [get_bd_pins axi_daq3_spi/s_axi_aresetn] 
   connect_bd_net -net sys_100m_resetn [get_bd_pins axi_daq3_gpio/s_axi_aresetn] 
+}
+
+if {$sys_zynq == 0} {
+
+  delete_bd_objs [get_bd_nets mb_intr_10_s] [get_bd_ports mb_intr_10]
+  delete_bd_objs [get_bd_nets mb_intr_11_s] [get_bd_ports mb_intr_11]
+  delete_bd_objs [get_bd_nets mb_intr_12_s] [get_bd_ports mb_intr_12]
+  delete_bd_objs [get_bd_nets mb_intr_13_s] [get_bd_ports mb_intr_13]
+  connect_bd_net -net axi_daq3_spi_intr     [get_bd_pins axi_daq3_spi/ip2intc_irpt]   [get_bd_pins sys_concat_intc/In10]
+  connect_bd_net -net axi_daq3_gpio_intr    [get_bd_pins axi_daq3_gpio/ip2intc_irpt]  [get_bd_pins sys_concat_intc/In11]
+  connect_bd_net -net axi_ad9152_dma_intr   [get_bd_pins axi_ad9152_dma/irq]          [get_bd_pins sys_concat_intc/In12]
+  connect_bd_net -net axi_ad9680_dma_intr   [get_bd_pins axi_ad9680_dma/irq]          [get_bd_pins sys_concat_intc/In13]
+
+} else {
+
+  delete_bd_objs [get_bd_nets ps_intr_12_s] [get_bd_ports ps_intr_12]
+  delete_bd_objs [get_bd_nets ps_intr_13_s] [get_bd_ports ps_intr_13]
+  connect_bd_net -net axi_ad9152_dma_intr   [get_bd_pins axi_ad9152_dma/irq]            [get_bd_pins sys_concat_intc/In12]
+  connect_bd_net -net axi_ad9680_dma_intr   [get_bd_pins axi_ad9680_dma/irq]            [get_bd_pins sys_concat_intc/In13]
 
-  connect_bd_net -net axi_daq3_spi_intr  [get_bd_pins axi_daq3_spi/ip2intc_irpt]   [get_bd_ports axi_daq3_spi_intr]  
-  connect_bd_net -net axi_daq3_gpio_intr [get_bd_pins axi_daq3_gpio/ip2intc_irpt]  [get_bd_ports axi_daq3_gpio_intr] 
 }
 
   # gt uses hp3, and 100MHz clock for both DRP and AXI4
diff --git a/projects/daq3/zc706/system_top.v b/projects/daq3/zc706/system_top.v
index 03262dac8..b3d0de231 100644
--- a/projects/daq3/zc706/system_top.v
+++ b/projects/daq3/zc706/system_top.v
@@ -512,8 +512,6 @@ module system_top (
     .ps_intr_1 (ps_intrs[1]),
     .ps_intr_10 (ps_intrs[10]),
     .ps_intr_11 (ps_intrs[11]),
-    .ps_intr_12 (ps_intrs[12]),
-    .ps_intr_13 (ps_intrs[13]),
     .ps_intr_2 (ps_intrs[2]),
     .ps_intr_3 (ps_intrs[3]),
     .ps_intr_4 (ps_intrs[4]),
@@ -522,8 +520,6 @@ module system_top (
     .ps_intr_7 (ps_intrs[7]),
     .ps_intr_8 (ps_intrs[8]),
     .ps_intr_9 (ps_intrs[9]),
-    .axi_ad9152_dma_intr (ps_intrs[12]),
-    .axi_ad9680_dma_intr (ps_intrs[13]),
     .rx_data_n (rx_data_n),
     .rx_data_p (rx_data_p),
     .rx_ref_clk (rx_ref_clk),