diff --git a/projects/fmcomms11/zc706/Makefile b/projects/fmcomms11/zc706/Makefile
index 6ac361e20..2fe7881e4 100644
--- a/projects/fmcomms11/zc706/Makefile
+++ b/projects/fmcomms11/zc706/Makefile
@@ -24,13 +24,13 @@ M_DEPS += ../../../library/xilinx/common/ad_iobuf.v
 M_DEPS += ../../../library/axi_ad9162/axi_ad9162.xpr
 M_DEPS += ../../../library/axi_ad9625/axi_ad9625.xpr
 M_DEPS += ../../../library/xilinx/axi_adcfifo/axi_adcfifo.xpr
+M_DEPS += ../../../library/xilinx/axi_adxcvr/axi_adxcvr.xpr
 M_DEPS += ../../../library/axi_clkgen/axi_clkgen.xpr
 M_DEPS += ../../../library/axi_dmac/axi_dmac.xpr
 M_DEPS += ../../../library/axi_hdmi_tx/axi_hdmi_tx.xpr
-M_DEPS += ../../../library/axi_jesd_gt/axi_jesd_gt.xpr
 M_DEPS += ../../../library/axi_spdif_tx/axi_spdif_tx.xpr
+M_DEPS += ../../../library/xilinx/util_adxcvr/util_adxcvr.xpr
 M_DEPS += ../../../library/util_dacfifo/util_dacfifo.xpr
-M_DEPS += ../../../library/util_jesd_gt/util_jesd_gt.xpr
 
 M_VIVADO := vivado -mode batch -source
 
@@ -62,13 +62,13 @@ clean-all:clean
 	make -C ../../../library/axi_ad9162 clean
 	make -C ../../../library/axi_ad9625 clean
 	make -C ../../../library/xilinx/axi_adcfifo clean
+	make -C ../../../library/xilinx/axi_adxcvr clean
 	make -C ../../../library/axi_clkgen clean
 	make -C ../../../library/axi_dmac clean
 	make -C ../../../library/axi_hdmi_tx clean
-	make -C ../../../library/axi_jesd_gt clean
 	make -C ../../../library/axi_spdif_tx clean
+	make -C ../../../library/xilinx/util_adxcvr clean
 	make -C ../../../library/util_dacfifo clean
-	make -C ../../../library/util_jesd_gt clean
 
 
 fmcomms11_zc706.sdk/system_top.hdf: $(M_DEPS)
@@ -80,13 +80,13 @@ lib:
 	make -C ../../../library/axi_ad9162
 	make -C ../../../library/axi_ad9625
 	make -C ../../../library/xilinx/axi_adcfifo
+	make -C ../../../library/xilinx/axi_adxcvr
 	make -C ../../../library/axi_clkgen
 	make -C ../../../library/axi_dmac
 	make -C ../../../library/axi_hdmi_tx
-	make -C ../../../library/axi_jesd_gt
 	make -C ../../../library/axi_spdif_tx
+	make -C ../../../library/xilinx/util_adxcvr
 	make -C ../../../library/util_dacfifo
-	make -C ../../../library/util_jesd_gt
 
 ####################################################################################
 ####################################################################################
diff --git a/projects/fmcomms11/zc706/system_constr.xdc b/projects/fmcomms11/zc706/system_constr.xdc
index 4f0d4369d..89407b217 100644
--- a/projects/fmcomms11/zc706/system_constr.xdc
+++ b/projects/fmcomms11/zc706/system_constr.xdc
@@ -67,6 +67,9 @@ set_property  -dict {PACKAGE_PIN  AD23  IOSTANDARD LVCMOS25} [get_ports ad9162_i
 
 create_clock -name tx_ref_clk   -period  6.40 [get_ports tx_ref_clk_p]
 create_clock -name rx_ref_clk   -period  6.40 [get_ports rx_ref_clk_p]
-create_clock -name tx_div_clk   -period  6.40 [get_pins i_system_wrapper/system_i/axi_fmcomms11_gt/inst/g_lane_1[0].i_channel/i_gt/i_gtxe2_channel/TXOUTCLK]
-create_clock -name rx_div_clk   -period  6.40 [get_pins i_system_wrapper/system_i/axi_fmcomms11_gt/inst/g_lane_1[0].i_channel/i_gt/i_gtxe2_channel/RXOUTCLK]
+create_clock -name tx_div_clk   -period  6.40 [get_pins i_system_wrapper/system_i/util_fmcomms11_xcvr/inst/i_xch_0/i_gtxe2_channel/TXOUTCLK]
+create_clock -name rx_div_clk   -period  6.40 [get_pins i_system_wrapper/system_i/util_fmcomms11_xcvr/inst/i_xch_0/i_gtxe2_channel/RXOUTCLK]
+
+set_false_path -from [get_cells i_system_wrapper/system_i/axi_ad9162_jesd_rstgen/U0/PR_OUT_DFF[0].peripheral_reset_reg[0]*]
+set_false_path -from [get_cells i_system_wrapper/system_i/axi_ad9625_jesd_rstgen/U0/PR_OUT_DFF[0].peripheral_reset_reg[0]*]
 
diff --git a/projects/fmcomms11/zc706/system_top.v b/projects/fmcomms11/zc706/system_top.v
index c124326ad..bdad159a4 100644
--- a/projects/fmcomms11/zc706/system_top.v
+++ b/projects/fmcomms11/zc706/system_top.v
@@ -279,10 +279,25 @@ module system_top (
     .ps_intr_09 (1'b0),
     .ps_intr_10 (1'b0),
     .ps_intr_11 (1'b0),
-    .rx_data_n (rx_data_n),
-    .rx_data_p (rx_data_p),
-    .rx_ref_clk (rx_ref_clk),
-    .rx_sync (rx_sync),
+    .rx_data_0_n (rx_data_n[0]),
+    .rx_data_0_p (rx_data_p[0]),
+    .rx_data_1_n (rx_data_n[1]),
+    .rx_data_1_p (rx_data_p[1]),
+    .rx_data_2_n (rx_data_n[2]),
+    .rx_data_2_p (rx_data_p[2]),
+    .rx_data_3_n (rx_data_n[3]),
+    .rx_data_3_p (rx_data_p[3]),
+    .rx_data_4_n (rx_data_n[4]),
+    .rx_data_4_p (rx_data_p[4]),
+    .rx_data_5_n (rx_data_n[5]),
+    .rx_data_5_p (rx_data_p[5]),
+    .rx_data_6_n (rx_data_n[6]),
+    .rx_data_6_p (rx_data_p[6]),
+    .rx_data_7_n (rx_data_n[7]),
+    .rx_data_7_p (rx_data_p[7]),
+    .rx_ref_clk_0 (rx_ref_clk),
+    .rx_sync_0 (rx_sync),
+    .rx_sysref_0 (sysref),
     .spdif (spdif),
     .spi0_clk_i (spi0_clk),
     .spi0_clk_o (spi0_clk),
@@ -305,11 +320,25 @@ module system_top (
     .sys_clk_clk_n (sys_clk_n),
     .sys_clk_clk_p (sys_clk_p),
     .sys_rst (sys_rst),
-    .sysref (sysref),
-    .tx_data_n (tx_data_n),
-    .tx_data_p (tx_data_p),
-    .tx_ref_clk (tx_ref_clk),
-    .tx_sync (tx_sync));
+    .tx_data_0_n (tx_data_n[0]),
+    .tx_data_0_p (tx_data_p[0]),
+    .tx_data_1_n (tx_data_n[1]),
+    .tx_data_1_p (tx_data_p[1]),
+    .tx_data_2_n (tx_data_n[2]),
+    .tx_data_2_p (tx_data_p[2]),
+    .tx_data_3_n (tx_data_n[3]),
+    .tx_data_3_p (tx_data_p[3]),
+    .tx_data_4_n (tx_data_n[4]),
+    .tx_data_4_p (tx_data_p[4]),
+    .tx_data_5_n (tx_data_n[5]),
+    .tx_data_5_p (tx_data_p[5]),
+    .tx_data_6_n (tx_data_n[6]),
+    .tx_data_6_p (tx_data_p[6]),
+    .tx_data_7_n (tx_data_n[7]),
+    .tx_data_7_p (tx_data_p[7]),
+    .tx_ref_clk_0 (tx_ref_clk),
+    .tx_sync_0 (tx_sync),
+    .tx_sysref_0 (sysref));
 
 endmodule