diff --git a/library/common/up_xfer_cntrl.v b/library/common/up_xfer_cntrl.v
index f919af62f..3a82e7a61 100644
--- a/library/common/up_xfer_cntrl.v
+++ b/library/common/up_xfer_cntrl.v
@@ -74,6 +74,9 @@ module up_xfer_cntrl (
 
   // internal registers
 
+  reg             up_xfer_state_m1 = 'd0;
+  reg             up_xfer_state_m2 = 'd0;
+  reg             up_xfer_state = 'd0;
   reg     [ 5:0]  up_xfer_count = 'd0;
   reg             up_xfer_done = 'd0;
   reg             up_xfer_toggle = 'd0;
@@ -81,24 +84,34 @@ module up_xfer_cntrl (
   reg             d_xfer_toggle_m1 = 'd0;
   reg             d_xfer_toggle_m2 = 'd0;
   reg             d_xfer_toggle_m3 = 'd0;
+  reg             d_xfer_toggle = 'd0;
   reg     [DW:0]  d_data_cntrl = 'd0;
 
   // internal signals
 
+  wire            up_xfer_enable_s;
   wire            d_xfer_toggle_s;
 
   // device control transfer
 
+  assign up_xfer_enable_s = up_xfer_state ^ up_xfer_toggle;
+
   always @(negedge up_rstn or posedge up_clk) begin
     if (up_rstn == 1'b0) begin
+      up_xfer_state_m1 <= 'd0;
+      up_xfer_state_m2 <= 'd0;
+      up_xfer_state <= 'd0;
       up_xfer_count <= 'd0;
       up_xfer_done <= 'd0;
       up_xfer_toggle <= 'd0;
       up_xfer_data <= 'd0;
     end else begin
+      up_xfer_state_m1 <= d_xfer_toggle;
+      up_xfer_state_m2 <= up_xfer_state_m1;
+      up_xfer_state <= up_xfer_state_m2;
       up_xfer_count <= up_xfer_count + 1'd1;
-      up_xfer_done <= (up_xfer_count == 6'd1) ? 1'b1 : 1'b0;
-      if (up_xfer_count == 6'd1) begin
+      up_xfer_done <= (up_xfer_count == 6'd1) ? ~up_xfer_enable_s : 1'b0;
+      if ((up_xfer_count == 6'd1) && (up_xfer_enable_s == 1'b0)) begin
         up_xfer_toggle <= ~up_xfer_toggle;
         up_xfer_data <= up_data_cntrl;
       end
@@ -112,11 +125,13 @@ module up_xfer_cntrl (
       d_xfer_toggle_m1 <= 'd0;
       d_xfer_toggle_m2 <= 'd0;
       d_xfer_toggle_m3 <= 'd0;
+      d_xfer_toggle <= 'd0;
       d_data_cntrl <= 'd0;
     end else begin
       d_xfer_toggle_m1 <= up_xfer_toggle;
       d_xfer_toggle_m2 <= d_xfer_toggle_m1;
       d_xfer_toggle_m3 <= d_xfer_toggle_m2;
+      d_xfer_toggle <= d_xfer_toggle_m3;
       if (d_xfer_toggle_s == 1'b1) begin
         d_data_cntrl <= up_xfer_data;
       end