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adrv9009zu11eg: Reduce SPI Clock speed to meet timing

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Adrian Costina 2019-11-15 12:03:52 +00:00
parent 4b380fe640
commit 81d3a9eb66
1 changed files with 1 additions and 1 deletions
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projects/adrv9009zu11eg/common/adrv9009zu11eg_constr.xdc
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@ -218,4 +218,4 @@ set_property -dict {PACKAGE_PIN AN21 IOSTANDARD LVCMOS18} [get_ports spi_clk]
set_property -dict {PACKAGE_PIN AP21 IOSTANDARD LVCMOS18} [get_ports spi_sdio]
set_property -dict {PACKAGE_PIN AR9 IOSTANDARD LVCMOS18} [get_ports spi_miso]
create_clock -name spi0_clk -period 40 [get_pins -hier */EMIOSPI0SCLKO]
create_clock -name spi0_clk -period 100 [get_pins -hier */EMIOSPI0SCLKO]