From 81d3a9eb66ef227432a0756451810ddff78bb41b Mon Sep 17 00:00:00 2001 From: Adrian Costina Date: Fri, 15 Nov 2019 12:03:52 +0000 Subject: [PATCH] adrv9009zu11eg: Reduce SPI Clock speed to meet timing --- projects/adrv9009zu11eg/common/adrv9009zu11eg_constr.xdc | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/projects/adrv9009zu11eg/common/adrv9009zu11eg_constr.xdc b/projects/adrv9009zu11eg/common/adrv9009zu11eg_constr.xdc index 6344d624e..cc800de01 100644 --- a/projects/adrv9009zu11eg/common/adrv9009zu11eg_constr.xdc +++ b/projects/adrv9009zu11eg/common/adrv9009zu11eg_constr.xdc @@ -218,4 +218,4 @@ set_property -dict {PACKAGE_PIN AN21 IOSTANDARD LVCMOS18} [get_ports spi_clk] set_property -dict {PACKAGE_PIN AP21 IOSTANDARD LVCMOS18} [get_ports spi_sdio] set_property -dict {PACKAGE_PIN AR9 IOSTANDARD LVCMOS18} [get_ports spi_miso] -create_clock -name spi0_clk -period 40 [get_pins -hier */EMIOSPI0SCLKO] +create_clock -name spi0_clk -period 100 [get_pins -hier */EMIOSPI0SCLKO]