From 8321d5a4fb69ca10dcc1e908d2747e25907f8a71 Mon Sep 17 00:00:00 2001
From: Istvan Csomortani <istvan.csomortani@analog.com>
Date: Thu, 8 Oct 2015 16:50:36 +0300
Subject: [PATCH] util_dacfifo: Update read out method

Update the way how the fifo push out its content. By default the fifo pushes out all its content, if an xfer_last signal is received, the fifo saves the last write address, and reads out until the saved address.
---
 library/util_dacfifo/util_dacfifo.v | 8 ++++++--
 1 file changed, 6 insertions(+), 2 deletions(-)

diff --git a/library/util_dacfifo/util_dacfifo.v b/library/util_dacfifo/util_dacfifo.v
index bc01dcd7f..a229aeacf 100644
--- a/library/util_dacfifo/util_dacfifo.v
+++ b/library/util_dacfifo/util_dacfifo.v
@@ -110,7 +110,7 @@ module util_dacfifo (
   always @(posedge dma_clk) begin
     if(dma_rst == 1'b1) begin
       dma_waddr <= 'b0;
-      dma_lastaddr <= {ADDRESS_WIDTH{1'b1}};
+      dma_lastaddr <= 'b0;
     end else begin
       if (dma_valid && dma_xfer_req) begin
         dma_waddr <= dma_waddr + 1;
@@ -135,7 +135,11 @@ module util_dacfifo (
   // generate dac read address
   always @(posedge dac_clk) begin
     if(dac_valid == 1'b1) begin
-      dac_raddr <= (dac_raddr < dma_lastaddr_2d) ? (dac_raddr + 1) : 'b0;
+      if (dma_lastaddr_2d == 'h0) begin
+        dac_raddr <= dac_raddr + 1;
+      end else begin
+        dac_raddr <= (dac_raddr < dma_lastaddr_2d) ? (dac_raddr + 1) : 'b0;
+      end
     end
     dac_data <= dac_data_s;
   end