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daq3/kcu105: updates

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Rejeesh Kutty 2015-12-14 09:29:48 -05:00
parent 07316a905e
commit 83fd4a53a7
4 changed files with 38 additions and 35 deletions
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10
projects/daq3/kcu105/system_bd.tcl
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@ -3,12 +3,12 @@ source $ad_hdl_dir/projects/common/kcu105/kcu105_system_bd.tcl
source $ad_hdl_dir/projects/common/xilinx/sys_dmafifo.tcl source $ad_hdl_dir/projects/common/xilinx/sys_dmafifo.tcl
p_sys_dmafifo [current_bd_instance .] axi_ad9680_fifo 128 16 p_sys_dmafifo [current_bd_instance .] axi_ad9680_fifo 128 16
p_sys_dacfifo [current_bd_instance .] axi_ad9144_fifo 128 10 p_sys_dacfifo [current_bd_instance .] axi_ad9152_fifo 128 10
source ../common/daq2_bd.tcl source ../common/daq3_bd.tcl
set_property -dict [list CONFIG.GTH_OR_GTX_N {1}] $axi_daq2_gt set_property -dict [list CONFIG.GTH_OR_GTX_N {1}] $axi_daq3_gt
set_property -dict [list CONFIG.QPLL0_FBDIV {20}] $axi_daq2_gt set_property -dict [list CONFIG.QPLL0_FBDIV {20}] $axi_daq3_gt
set_property -dict [list CONFIG.QPLL0_REFCLK_DIV {1}] $axi_daq2_gt set_property -dict [list CONFIG.QPLL0_REFCLK_DIV {1}] $axi_daq3_gt

24
projects/daq3/kcu105/system_constr.xdc
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@ -1,5 +1,5 @@
# daq2 # daq3
set_property -dict {PACKAGE_PIN H6} [get_ports rx_ref_clk_p] ; ## B20 FMC_HPC_GBTCLK1_M2C_P set_property -dict {PACKAGE_PIN H6} [get_ports rx_ref_clk_p] ; ## B20 FMC_HPC_GBTCLK1_M2C_P
set_property -dict {PACKAGE_PIN H5} [get_ports rx_ref_clk_n] ; ## B21 FMC_HPC_GBTCLK1_M2C_N set_property -dict {PACKAGE_PIN H5} [get_ports rx_ref_clk_n] ; ## B21 FMC_HPC_GBTCLK1_M2C_N
@ -20,15 +20,15 @@ set_property -dict {PACKAGE_PIN L8 IOSTANDARD LVCMOS18} [get_ports spi_csn_da
set_property -dict {PACKAGE_PIN H9 IOSTANDARD LVCMOS18} [get_ports spi_csn_adc] ; ## D15 FMC_HPC_LA09_N set_property -dict {PACKAGE_PIN H9 IOSTANDARD LVCMOS18} [get_ports spi_csn_adc] ; ## D15 FMC_HPC_LA09_N
set_property -dict {PACKAGE_PIN K13 IOSTANDARD LVCMOS18} [get_ports spi_clk] ; ## D12 FMC_HPC_LA05_N set_property -dict {PACKAGE_PIN K13 IOSTANDARD LVCMOS18} [get_ports spi_clk] ; ## D12 FMC_HPC_LA05_N
set_property -dict {PACKAGE_PIN J9 IOSTANDARD LVCMOS18} [get_ports spi_sdio] ; ## D14 FMC_HPC_LA09_P set_property -dict {PACKAGE_PIN J9 IOSTANDARD LVCMOS18} [get_ports spi_sdio] ; ## D14 FMC_HPC_LA09_P
set_property -dict {PACKAGE_PIN H8 IOSTANDARD LVCMOS18} [get_ports spi_dir] ; ## G13 FMC_HPC_LA08_N set_property -dict {PACKAGE_PIN C13 IOSTANDARD LVCMOS18} [get_ports spi_dir] ; ## C11 FMC_HPC_LA06_N
set_property -dict {PACKAGE_PIN J8 IOSTANDARD LVCMOS18} [get_ports clkd_sync] ; ## G12 FMC_HPC_LA08_P set_property -dict {PACKAGE_PIN D9 IOSTANDARD LVDS} [get_ports sysref_p] ; ## D17 FMC_HPC_LA13_P
set_property -dict {PACKAGE_PIN K8 IOSTANDARD LVCMOS18} [get_ports dac_reset] ; ## C15 FMC_HPC_LA10_N set_property -dict {PACKAGE_PIN C9 IOSTANDARD LVDS} [get_ports sysref_n] ; ## D18 FMC_HPC_LA13_N
set_property -dict {PACKAGE_PIN D10 IOSTANDARD LVCMOS18} [get_ports dac_txen] ; ## G16 FMC_HPC_LA12_N set_property -dict {PACKAGE_PIN D10 IOSTANDARD LVCMOS18} [get_ports dac_txen] ; ## G16 FMC_HPC_LA12_N
set_property -dict {PACKAGE_PIN D13 IOSTANDARD LVCMOS18} [get_ports adc_pd] ; ## C10 FMC_HPC_LA06_P set_property -dict {PACKAGE_PIN D13 IOSTANDARD LVCMOS18} [get_ports adc_pd] ; ## C10 FMC_HPC_LA06_P
set_property -dict {PACKAGE_PIN D9 IOSTANDARD LVCMOS18} [get_ports clkd_status[0]] ; ## D17 FMC_HPC_LA13_P set_property -dict {PACKAGE_PIN J8 IOSTANDARD LVCMOS18} [get_ports clkd_status[0]] ; ## G12 FMC_HPC_LA08_P
set_property -dict {PACKAGE_PIN C9 IOSTANDARD LVCMOS18} [get_ports clkd_status[1]] ; ## D18 FMC_HPC_LA13_N set_property -dict {PACKAGE_PIN H8 IOSTANDARD LVCMOS18} [get_ports clkd_status[1]] ; ## G13 FMC_HPC_LA08_N
set_property -dict {PACKAGE_PIN E10 IOSTANDARD LVCMOS18} [get_ports dac_irq] ; ## G15 FMC_HPC_LA12_P set_property -dict {PACKAGE_PIN E10 IOSTANDARD LVCMOS18} [get_ports dac_irq] ; ## G15 FMC_HPC_LA12_P
set_property -dict {PACKAGE_PIN K11 IOSTANDARD LVCMOS18} [get_ports adc_fda] ; ## H16 FMC_HPC_LA11_P set_property -dict {PACKAGE_PIN K11 IOSTANDARD LVCMOS18} [get_ports adc_fda] ; ## H16 FMC_HPC_LA11_P
set_property -dict {PACKAGE_PIN J11 IOSTANDARD LVCMOS18} [get_ports adc_fdb] ; ## H17 FMC_HPC_LA11_N set_property -dict {PACKAGE_PIN J11 IOSTANDARD LVCMOS18} [get_ports adc_fdb] ; ## H17 FMC_HPC_LA11_N
@ -40,8 +40,8 @@ set_property -dict {PACKAGE_PIN E8 IOSTANDARD LVDS DIFF_TERM_ADV TERM_100} [g
create_clock -name tx_ref_clk -period 2.00 [get_ports tx_ref_clk_p] create_clock -name tx_ref_clk -period 2.00 [get_ports tx_ref_clk_p]
create_clock -name rx_ref_clk -period 2.00 [get_ports rx_ref_clk_p] create_clock -name rx_ref_clk -period 2.00 [get_ports rx_ref_clk_p]
create_clock -name tx_div_clk -period 4.00 [get_pins i_system_wrapper/system_i/axi_daq2_gt/inst/g_lane_1[0].i_channel/i_gt/i_gthe3_channel/TXOUTCLK] create_clock -name tx_div_clk -period 4.00 [get_pins i_system_wrapper/system_i/axi_daq3_gt/inst/g_lane_1[0].i_channel/i_gt/i_gthe3_channel/TXOUTCLK]
create_clock -name rx_div_clk -period 4.00 [get_pins i_system_wrapper/system_i/axi_daq2_gt/inst/g_lane_1[0].i_channel/i_gt/i_gthe3_channel/RXOUTCLK] create_clock -name rx_div_clk -period 4.00 [get_pins i_system_wrapper/system_i/axi_daq3_gt/inst/g_lane_1[0].i_channel/i_gt/i_gthe3_channel/RXOUTCLK]
# gt pin assignments below are for reference only and are ignored by the tool! # gt pin assignments below are for reference only and are ignored by the tool!
@ -62,8 +62,8 @@ create_clock -name rx_div_clk -period 4.00 [get_pins i_system_wrapper/system_
## set_property -dict {PACKAGE_PIN D6} [get_ports tx_data_p[3]] ; ## A22 FMC_HPC_DP1_C2M_P (tx_data_p[2]) ## set_property -dict {PACKAGE_PIN D6} [get_ports tx_data_p[3]] ; ## A22 FMC_HPC_DP1_C2M_P (tx_data_p[2])
## set_property -dict {PACKAGE_PIN D5} [get_ports tx_data_n[3]] ; ## A23 FMC_HPC_DP1_C2M_N (tx_data_n[2]) ## set_property -dict {PACKAGE_PIN D5} [get_ports tx_data_n[3]] ; ## A23 FMC_HPC_DP1_C2M_N (tx_data_n[2])
set_property LOC GTHE3_CHANNEL_X0Y19 [get_cells -hierarchical -filter {NAME =~ *axi_daq2_gt/inst/g_lane_1[0].i_channel/i_gt/i_gthe3_channel}] set_property LOC GTHE3_CHANNEL_X0Y19 [get_cells -hierarchical -filter {NAME =~ *axi_daq3_gt/inst/g_lane_1[0].i_channel/i_gt/i_gthe3_channel}]
set_property LOC GTHE3_CHANNEL_X0Y16 [get_cells -hierarchical -filter {NAME =~ *axi_daq2_gt/inst/g_lane_1[1].i_channel/i_gt/i_gthe3_channel}] set_property LOC GTHE3_CHANNEL_X0Y16 [get_cells -hierarchical -filter {NAME =~ *axi_daq3_gt/inst/g_lane_1[1].i_channel/i_gt/i_gthe3_channel}]
set_property LOC GTHE3_CHANNEL_X0Y18 [get_cells -hierarchical -filter {NAME =~ *axi_daq2_gt/inst/g_lane_1[2].i_channel/i_gt/i_gthe3_channel}] set_property LOC GTHE3_CHANNEL_X0Y18 [get_cells -hierarchical -filter {NAME =~ *axi_daq3_gt/inst/g_lane_1[2].i_channel/i_gt/i_gthe3_channel}]
set_property LOC GTHE3_CHANNEL_X0Y17 [get_cells -hierarchical -filter {NAME =~ *axi_daq2_gt/inst/g_lane_1[3].i_channel/i_gt/i_gthe3_channel}] set_property LOC GTHE3_CHANNEL_X0Y17 [get_cells -hierarchical -filter {NAME =~ *axi_daq3_gt/inst/g_lane_1[3].i_channel/i_gt/i_gthe3_channel}]

8
projects/daq3/kcu105/system_project.tcl
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@ -5,9 +5,9 @@ source ../../scripts/adi_env.tcl
source $ad_hdl_dir/projects/scripts/adi_project.tcl source $ad_hdl_dir/projects/scripts/adi_project.tcl
source $ad_hdl_dir/projects/scripts/adi_board.tcl source $ad_hdl_dir/projects/scripts/adi_board.tcl
adi_project_create daq2_kcu105 adi_project_create daq3_kcu105
adi_project_files daq2_kcu105 [list \ adi_project_files daq3_kcu105 [list \
"../common/daq2_spi.v" \ "../common/daq3_spi.v" \
"system_top.v" \ "system_top.v" \
"system_constr.xdc"\ "system_constr.xdc"\
"$ad_hdl_dir/library/common/ad_iobuf.v" \ "$ad_hdl_dir/library/common/ad_iobuf.v" \
@ -16,6 +16,6 @@ adi_project_files daq2_kcu105 [list \
set_property PROCESSING_ORDER EARLY [get_files $ad_hdl_dir/projects/common/kcu105/kcu105_system_constr.xdc] set_property PROCESSING_ORDER EARLY [get_files $ad_hdl_dir/projects/common/kcu105/kcu105_system_constr.xdc]
set_property PROCESSING_ORDER EARLY [get_files system_constr.xdc] set_property PROCESSING_ORDER EARLY [get_files system_constr.xdc]
adi_project_run daq2_kcu105 adi_project_run daq3_kcu105

31
projects/daq3/kcu105/system_top.v
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@ -108,8 +108,8 @@ module system_top (
adc_pd, adc_pd,
dac_txen, dac_txen,
dac_reset, sysref_p,
clkd_sync, sysref_n,
spi_csn_clk, spi_csn_clk,
spi_csn_dac, spi_csn_dac,
@ -185,8 +185,8 @@ module system_top (
inout adc_pd; inout adc_pd;
inout dac_txen; inout dac_txen;
inout dac_reset; output sysref_p;
inout clkd_sync; output sysref_n;
output spi_csn_clk; output spi_csn_clk;
output spi_csn_dac; output spi_csn_dac;
@ -257,7 +257,7 @@ module system_top (
.IB (tx_sync_n), .IB (tx_sync_n),
.O (tx_sync)); .O (tx_sync));
daq2_spi i_spi ( daq3_spi i_spi (
.spi_csn (spi_csn[2:0]), .spi_csn (spi_csn[2:0]),
.spi_clk (spi_clk), .spi_clk (spi_clk),
.spi_mosi (spi_mosi), .spi_mosi (spi_mosi),
@ -265,21 +265,24 @@ module system_top (
.spi_sdio (spi_sdio), .spi_sdio (spi_sdio),
.spi_dir (spi_dir)); .spi_dir (spi_dir));
OBUFDS i_obufds_sysref (
.I (gpio_o[40]),
.O (sysref_p),
.OB (sysref_n));
IBUFDS i_ibufds_trig ( IBUFDS i_ibufds_trig (
.I (trig_p), .I (trig_p),
.IB (trig_n), .IB (trig_n),
.O (trig)); .O (trig));
assign gpio_i[43] = trig; assign gpio_i[39] = trig;
ad_iobuf #(.DATA_WIDTH(9)) i_iobuf ( ad_iobuf #(.DATA_WIDTH(7)) i_iobuf (
.dio_t ({gpio_t[42:40], gpio_t[38], gpio_t[36:32]}), .dio_t (gpio_t[38:32]),
.dio_i ({gpio_o[42:40], gpio_o[38], gpio_o[36:32]}), .dio_i (gpio_o[38:32]),
.dio_o ({gpio_i[42:40], gpio_i[38], gpio_i[36:32]}), .dio_o (gpio_i[38:32]),
.dio_p ({ adc_pd, // 42 .dio_p ({ adc_pd, // 38
dac_txen, // 41 dac_txen, // 37
dac_reset, // 40
clkd_sync, // 38
adc_fdb, // 36 adc_fdb, // 36
adc_fda, // 35 adc_fda, // 35
dac_irq, // 34 dac_irq, // 34