diff --git a/projects/ad9434_fmc/common/ad9434_bd.tcl b/projects/ad9434_fmc/common/ad9434_bd.tcl index 74e89b8d8..d009e48e6 100644 --- a/projects/ad9434_fmc/common/ad9434_bd.tcl +++ b/projects/ad9434_fmc/common/ad9434_bd.tcl @@ -1,25 +1,11 @@ # ad9434 interface -set adc_clk_p [create_bd_port -dir I adc_clk_p] -set adc_clk_n [create_bd_port -dir I adc_clk_n] -set adc_data_p [create_bd_port -dir I -from 11 -to 0 adc_data_p] -set adc_data_n [create_bd_port -dir I -from 11 -to 0 adc_data_n] -set adc_or_p [create_bd_port -dir I adc_or_p] -set adc_or_n [create_bd_port -dir I adc_or_n] - -# spi interface - -set spi_clk_i [create_bd_port -dir I spi_clk_i] -set spi_clk_o [create_bd_port -dir O spi_clk_o] -set spi_csn_i [create_bd_port -dir I spi_csn_i] -set spi_csn_adc_o [create_bd_port -dir O spi_csn_adc_o] -set spi_csn_clk_o [create_bd_port -dir O spi_csn_clk_o] -set spi_mosi_i [create_bd_port -dir I spi_mosi_i] -set spi_mosi_o [create_bd_port -dir O spi_mosi_o] -set spi_miso_i [create_bd_port -dir I spi_miso_i] - -# interrupts -set ad9434_dma_intr [create_bd_port -dir O ad9434_dma_intr] +create_bd_port -dir I adc_clk_p +create_bd_port -dir I adc_clk_n +create_bd_port -dir I -from 11 -to 0 adc_data_p +create_bd_port -dir I -from 11 -to 0 adc_data_n +create_bd_port -dir I adc_or_p +create_bd_port -dir I adc_or_n # ad9434 @@ -40,90 +26,37 @@ set_property -dict [list CONFIG.C_CLKS_ASYNC_REQ_SRC {1}] $axi_ad9434_dma set_property -dict [list CONFIG.C_2D_TRANSFER {0}] $axi_ad9434_dma set_property -dict [list CONFIG.C_DMA_DATA_WIDTH_SRC {64}] $axi_ad9434_dma -# dma interconnect - -set axi_ad9434_dma_interconnect [create_bd_cell -type ip -vlnv xilinx.com:ip:axi_interconnect:2.1 axi_ad9434_dma_interconnect] -set_property -dict [list CONFIG.NUM_MI {1}] $axi_ad9434_dma_interconnect - # additions to default configuration -set_property -dict [list CONFIG.NUM_MI {9}] $axi_cpu_interconnect - set_property -dict [list CONFIG.PCW_USE_S_AXI_HP1 {1}] $sys_ps7 -set_property -dict [list CONFIG.PCW_EN_CLK2_PORT {1}] $sys_ps7 -set_property -dict [list CONFIG.PCW_EN_RST2_PORT {1}] $sys_ps7 -set_property -dict [list CONFIG.PCW_FPGA2_PERIPHERAL_FREQMHZ {200.0}] $sys_ps7 -set_property -dict [list CONFIG.PCW_SPI0_PERIPHERAL_ENABLE {1}] $sys_ps7 -set_property -dict [list CONFIG.PCW_SPI0_SPI0_IO {EMIO}] $sys_ps7 -set_property -dict [list CONFIG.PCW_GPIO_EMIO_GPIO_IO {15}] $sys_ps7 - -set_property LEFT 14 [get_bd_ports GPIO_I] -set_property LEFT 14 [get_bd_ports GPIO_O] -set_property LEFT 14 [get_bd_ports GPIO_T] - -# spi connections - -connect_bd_net -net spi_csn_i [get_bd_ports spi_csn_i] [get_bd_pins sys_ps7/SPI0_SS_I] -connect_bd_net -net spi_csn_adc_o [get_bd_ports spi_csn_adc_o] [get_bd_pins sys_ps7/SPI0_SS_O] -connect_bd_net -net spi_csn_clk_o [get_bd_ports spi_csn_clk_o] [get_bd_pins sys_ps7/SPI0_SS1_O] -connect_bd_net -net spi_clk_i [get_bd_ports spi_clk_i] [get_bd_pins sys_ps7/SPI0_SCLK_I] -connect_bd_net -net spi_clk_o [get_bd_ports spi_clk_o] [get_bd_pins sys_ps7/SPI0_SCLK_O] -connect_bd_net -net spi_mosi_i [get_bd_ports spi_mosi_i] [get_bd_pins sys_ps7/SPI0_MOSI_I] -connect_bd_net -net spi_mosi_o [get_bd_ports spi_mosi_o] [get_bd_pins sys_ps7/SPI0_MOSI_O] -connect_bd_net -net spi_miso_i [get_bd_ports spi_miso_i] [get_bd_pins sys_ps7/SPI0_MISO_I] # ad9434 connections -connect_bd_net -net sys_200m_clk [get_bd_pins axi_ad9434/delay_clk] -connect_bd_net -net axi_ad9434_clk [get_bd_pins axi_ad9434/adc_clk] -connect_bd_net -net axi_ad9434_clk [get_bd_pins axi_ad9434_dma/fifo_wr_clk] +ad_connect sys_200m_clk axi_ad9434/delay_clk +ad_connect axi_ad9434/adc_clk axi_ad9434_dma/fifo_wr_clk -connect_bd_net -net axi_ad9434_clk_in_p [get_bd_ports adc_clk_p] [get_bd_pins axi_ad9434/adc_clk_in_p] -connect_bd_net -net axi_ad9434_clk_in_n [get_bd_ports adc_clk_n] [get_bd_pins axi_ad9434/adc_clk_in_n] -connect_bd_net -net axi_ad9434_data_in_p [get_bd_ports adc_data_p] [get_bd_pins axi_ad9434/adc_data_in_p] -connect_bd_net -net axi_ad9434_data_in_n [get_bd_ports adc_data_n] [get_bd_pins axi_ad9434/adc_data_in_n] -connect_bd_net -net axi_ad9434_or_in_p [get_bd_ports adc_or_p] [get_bd_pins axi_ad9434/adc_or_in_p] -connect_bd_net -net axi_ad9434_or_in_n [get_bd_ports adc_or_n] [get_bd_pins axi_ad9434/adc_or_in_n] +ad_connect adc_clk_p axi_ad9434/adc_clk_in_p +ad_connect adc_clk_n axi_ad9434/adc_clk_in_n +ad_connect adc_data_p axi_ad9434/adc_data_in_p +ad_connect adc_data_n axi_ad9434/adc_data_in_n +ad_connect adc_or_p axi_ad9434/adc_or_in_p +ad_connect adc_or_n axi_ad9434/adc_or_in_n -connect_bd_net -net axi_ad9434_denable [get_bd_pins axi_ad9434/adc_valid] [get_bd_pins axi_ad9434_dma/fifo_wr_en] -connect_bd_net -net axi_ad9434_data [get_bd_pins axi_ad9434/adc_data] [get_bd_pins axi_ad9434_dma/fifo_wr_din] -connect_bd_net -net axi_ad9434_ovf [get_bd_pins axi_ad9434/adc_dovf] [get_bd_pins axi_ad9434_dma/fifo_wr_overflow] +ad_connect axi_ad9434/adc_valid axi_ad9434_dma/fifo_wr_en +ad_connect axi_ad9434/adc_data axi_ad9434_dma/fifo_wr_din +ad_connect axi_ad9434/adc_dovf axi_ad9434_dma/fifo_wr_overflow -connect_bd_net -net axi_ad9434_dma_irq [get_bd_pins axi_ad9434_dma/irq] [get_bd_ports ad9434_dma_intr] +# interconnect -# cpu interconnect - -connect_bd_intf_net -intf_net axi_cpu_interconnect_m07_axi [get_bd_intf_pins axi_cpu_interconnect/M07_AXI] [get_bd_intf_pins axi_ad9434/s_axi] -connect_bd_intf_net -intf_net axi_cpu_interconnect_m08_axi [get_bd_intf_pins axi_cpu_interconnect/M08_AXI] [get_bd_intf_pins axi_ad9434_dma/s_axi] -connect_bd_net -net sys_100m_clk [get_bd_pins axi_cpu_interconnect/M07_ACLK] $sys_100m_clk_source -connect_bd_net -net sys_100m_clk [get_bd_pins axi_cpu_interconnect/M08_ACLK] $sys_100m_clk_source -connect_bd_net -net sys_100m_clk [get_bd_pins axi_ad9434/s_axi_aclk] -connect_bd_net -net sys_100m_clk [get_bd_pins axi_ad9434_dma/s_axi_aclk] -connect_bd_net -net sys_100m_resetn [get_bd_pins axi_cpu_interconnect/M07_ARESETN] $sys_100m_resetn_source -connect_bd_net -net sys_100m_resetn [get_bd_pins axi_cpu_interconnect/M08_ARESETN] $sys_100m_resetn_source -connect_bd_net -net sys_100m_resetn [get_bd_pins axi_ad9434/s_axi_aresetn] -connect_bd_net -net sys_100m_resetn [get_bd_pins axi_ad9434_dma/s_axi_aresetn] +ad_cpu_interconnect 0x44A00000 axi_ad9434 +ad_cpu_interconnect 0x44A30000 axi_ad9434_dma # memory inteconnect -set dma_clk_source [get_bd_pins sys_ps7/FCLK_CLK2] -connect_bd_net -net dma_clk $dma_clk_source +ad_mem_hp1_interconnect sys_cpu_clk sys_ps7/S_AXI_HP1 +ad_mem_hp1_interconnect sys_cpu_clk axi_ad9434_dma/m_dest_axi -connect_bd_intf_net -intf_net axi_ad9434_dma_interconnect_s00_axi [get_bd_intf_pins axi_ad9434_dma_interconnect/S00_AXI] [get_bd_intf_pins axi_ad9434_dma/m_dest_axi] -connect_bd_intf_net -intf_net axi_ad9434_dma_interconnect_m00_axi [get_bd_intf_pins axi_ad9434_dma_interconnect/M00_AXI] [get_bd_intf_pins sys_ps7/S_AXI_HP1] -connect_bd_net -net dma_clk [get_bd_pins axi_ad9434_dma_interconnect/ACLK] $dma_clk_source -connect_bd_net -net dma_clk [get_bd_pins axi_ad9434_dma_interconnect/M00_ACLK] $dma_clk_source -connect_bd_net -net dma_clk [get_bd_pins axi_ad9434_dma_interconnect/S00_ACLK] $dma_clk_source -connect_bd_net -net dma_clk [get_bd_pins axi_ad9434_dma/m_dest_axi_aclk] -connect_bd_net -net dma_clk [get_bd_pins sys_ps7/S_AXI_HP1_ACLK] -connect_bd_net -net sys_100m_resetn [get_bd_pins axi_ad9434_dma_interconnect/ARESETN] $sys_100m_resetn_source -connect_bd_net -net sys_100m_resetn [get_bd_pins axi_ad9434_dma_interconnect/M00_ARESETN] $sys_100m_resetn_source -connect_bd_net -net sys_100m_resetn [get_bd_pins axi_ad9434_dma_interconnect/S00_ARESETN] $sys_100m_resetn_source -connect_bd_net -net sys_100m_resetn [get_bd_pins axi_ad9434_dma/m_dest_axi_aresetn] $sys_100m_resetn_source +# interrupts -# address map - -create_bd_addr_seg -range 0x00010000 -offset 0x44A00000 $sys_addr_cntrl_space [get_bd_addr_segs axi_ad9434/s_axi/axi_lite] SEG_data_ad9434_core -create_bd_addr_seg -range 0x00010000 -offset 0x44A30000 $sys_addr_cntrl_space [get_bd_addr_segs axi_ad9434_dma/s_axi/axi_lite] SEG_data_ad9434_dma -create_bd_addr_seg -range $sys_mem_size -offset 0x00000000 [get_bd_addr_spaces axi_ad9434_dma/m_dest_axi] [get_bd_addr_segs sys_ps7/S_AXI_HP1/HP1_DDR_LOWOCM] SEG_sys_ps7_hp1_ddr_lowocm +ad_cpu_interrupt ps-13 mb-12 axi_ad9434_dma/irq diff --git a/projects/ad9434_fmc/zc706/system_project.tcl b/projects/ad9434_fmc/zc706/system_project.tcl index 43f5ee5b8..3088949cb 100644 --- a/projects/ad9434_fmc/zc706/system_project.tcl +++ b/projects/ad9434_fmc/zc706/system_project.tcl @@ -1,6 +1,7 @@ source ../../scripts/adi_env.tcl source $ad_hdl_dir/projects/scripts/adi_project.tcl +source $ad_hdl_dir/projects/scripts/adi_board.tcl set project_name ad9434_fmc_zc706 @@ -9,6 +10,7 @@ adi_project_create $project_name adi_project_files $project_name [list "../common/ad9434_spi.v" \ "system_top.v" \ "system_constr.xdc" \ + "$ad_hdl_dir/library/common/ad_iobuf.v" \ "$ad_hdl_dir/projects/common/zc706/zc706_system_constr.xdc"] adi_project_run $project_name diff --git a/projects/ad9434_fmc/zc706/system_top.v b/projects/ad9434_fmc/zc706/system_top.v index a3f8cf397..64c243ef3 100644 --- a/projects/ad9434_fmc/zc706/system_top.v +++ b/projects/ad9434_fmc/zc706/system_top.v @@ -41,28 +41,28 @@ module system_top ( - DDR_addr, - DDR_ba, - DDR_cas_n, - DDR_ck_n, - DDR_ck_p, - DDR_cke, - DDR_cs_n, - DDR_dm, - DDR_dq, - DDR_dqs_n, - DDR_dqs_p, - DDR_odt, - DDR_ras_n, - DDR_reset_n, - DDR_we_n, + ddr_addr, + ddr_ba, + ddr_cas_n, + ddr_ck_n, + ddr_ck_p, + ddr_cke, + ddr_cs_n, + ddr_dm, + ddr_dq, + ddr_dqs_n, + ddr_dqs_p, + ddr_odt, + ddr_ras_n, + ddr_reset_n, + ddr_we_n, - FIXED_IO_ddr_vrn, - FIXED_IO_ddr_vrp, - FIXED_IO_mio, - FIXED_IO_ps_clk, - FIXED_IO_ps_porb, - FIXED_IO_ps_srstb, + fixed_io_ddr_vrn, + fixed_io_ddr_vrp, + fixed_io_mio, + fixed_io_ps_clk, + fixed_io_ps_porb, + fixed_io_ps_srstb, gpio_bd, @@ -89,28 +89,28 @@ module system_top ( spi_sclk, spi_dio); - inout [14:0] DDR_addr; - inout [ 2:0] DDR_ba; - inout DDR_cas_n; - inout DDR_ck_n; - inout DDR_ck_p; - inout DDR_cke; - inout DDR_cs_n; - inout [ 3:0] DDR_dm; - inout [31:0] DDR_dq; - inout [ 3:0] DDR_dqs_n; - inout [ 3:0] DDR_dqs_p; - inout DDR_odt; - inout DDR_ras_n; - inout DDR_reset_n; - inout DDR_we_n; + inout [14:0] ddr_addr; + inout [ 2:0] ddr_ba; + inout ddr_cas_n; + inout ddr_ck_n; + inout ddr_ck_p; + inout ddr_cke; + inout ddr_cs_n; + inout [ 3:0] ddr_dm; + inout [31:0] ddr_dq; + inout [ 3:0] ddr_dqs_n; + inout [ 3:0] ddr_dqs_p; + inout ddr_odt; + inout ddr_ras_n; + inout ddr_reset_n; + inout ddr_we_n; - inout FIXED_IO_ddr_vrn; - inout FIXED_IO_ddr_vrp; - inout [53:0] FIXED_IO_mio; - inout FIXED_IO_ps_clk; - inout FIXED_IO_ps_porb; - inout FIXED_IO_ps_srstb; + inout fixed_io_ddr_vrn; + inout fixed_io_ddr_vrp; + inout [53:0] fixed_io_mio; + inout fixed_io_ps_clk; + inout fixed_io_ps_porb; + inout fixed_io_ps_srstb; inout [14:0] gpio_bd; @@ -139,29 +139,22 @@ module system_top ( // internal signals - wire [14:0] gpio_i; - wire [14:0] gpio_o; - wire [14:0] gpio_t; + wire [63:0] gpio_i; + wire [63:0] gpio_o; + wire [63:0] gpio_t; wire spi_miso; wire spi_mosi; wire spi_csn_adc; wire spi_csn_clk; - wire [15:0] ps_intrs; - // instantiations - genvar n; - generate - for (n = 0; n <= 14; n = n + 1) begin: g_iobuf_gpio_bd - IOBUF i_iobuf_gpio_bd ( - .I (gpio_o[n]), - .O (gpio_i[n]), - .T (gpio_t[n]), - .IO (gpio_bd[n])); - end - endgenerate + ad_iobuf #(.DATA_WIDTH(15)) i_iobuf_gpio ( + .di (gpio_o[14:0]), + .do (gpio_i[14:0]), + .dt (gpio_t[14:0]), + .dio (gpio_bd)); ad9434_spi i_spi ( .spi_csn({spi_csn_clk, spi_csn_adc}), @@ -172,30 +165,30 @@ module system_top ( ); system_wrapper i_system_wrapper ( - .DDR_addr (DDR_addr), - .DDR_ba (DDR_ba), - .DDR_cas_n (DDR_cas_n), - .DDR_ck_n (DDR_ck_n), - .DDR_ck_p (DDR_ck_p), - .DDR_cke (DDR_cke), - .DDR_cs_n (DDR_cs_n), - .DDR_dm (DDR_dm), - .DDR_dq (DDR_dq), - .DDR_dqs_n (DDR_dqs_n), - .DDR_dqs_p (DDR_dqs_p), - .DDR_odt (DDR_odt), - .DDR_ras_n (DDR_ras_n), - .DDR_reset_n (DDR_reset_n), - .DDR_we_n (DDR_we_n), - .FIXED_IO_ddr_vrn (FIXED_IO_ddr_vrn), - .FIXED_IO_ddr_vrp (FIXED_IO_ddr_vrp), - .FIXED_IO_mio (FIXED_IO_mio), - .FIXED_IO_ps_clk (FIXED_IO_ps_clk), - .FIXED_IO_ps_porb (FIXED_IO_ps_porb), - .FIXED_IO_ps_srstb (FIXED_IO_ps_srstb), - .GPIO_I (gpio_i), - .GPIO_O (gpio_o), - .GPIO_T (gpio_t), + .ddr_addr (ddr_addr), + .ddr_ba (ddr_ba), + .ddr_cas_n (ddr_cas_n), + .ddr_ck_n (ddr_ck_n), + .ddr_ck_p (ddr_ck_p), + .ddr_cke (ddr_cke), + .ddr_cs_n (ddr_cs_n), + .ddr_dm (ddr_dm), + .ddr_dq (ddr_dq), + .ddr_dqs_n (ddr_dqs_n), + .ddr_dqs_p (ddr_dqs_p), + .ddr_odt (ddr_odt), + .ddr_ras_n (ddr_ras_n), + .ddr_reset_n (ddr_reset_n), + .ddr_we_n (ddr_we_n), + .fixed_io_ddr_vrn (fixed_io_ddr_vrn), + .fixed_io_ddr_vrp (fixed_io_ddr_vrp), + .fixed_io_mio (fixed_io_mio), + .fixed_io_ps_clk (fixed_io_ps_clk), + .fixed_io_ps_porb (fixed_io_ps_porb), + .fixed_io_ps_srstb (fixed_io_ps_srstb), + .gpio_i (gpio_i), + .gpio_o (gpio_o), + .gpio_t (gpio_t), .hdmi_data (hdmi_data), .hdmi_data_e (hdmi_data_e), .hdmi_hsync (hdmi_hsync), @@ -203,21 +196,19 @@ module system_top ( .hdmi_vsync (hdmi_vsync), .iic_main_scl_io (iic_scl), .iic_main_sda_io (iic_sda), - .ps_intr_0 (ps_intrs[0]), - .ps_intr_1 (ps_intrs[1]), - .ps_intr_2 (ps_intrs[2]), - .ps_intr_3 (ps_intrs[3]), - .ps_intr_4 (ps_intrs[4]), - .ps_intr_5 (ps_intrs[5]), - .ps_intr_6 (ps_intrs[6]), - .ps_intr_7 (ps_intrs[7]), - .ps_intr_8 (ps_intrs[8]), - .ps_intr_9 (ps_intrs[9]), - .ps_intr_10 (ps_intrs[10]), - .ps_intr_11 (ps_intrs[11]), - .ps_intr_12 (ps_intrs[12]), - .ps_intr_13 (ps_intrs[13]), - .ad9434_dma_intr (ps_intrs[13]), + .ps_intr_00 (1'b0), + .ps_intr_01 (1'b0), + .ps_intr_02 (1'b0), + .ps_intr_03 (1'b0), + .ps_intr_04 (1'b0), + .ps_intr_05 (1'b0), + .ps_intr_06 (1'b0), + .ps_intr_07 (1'b0), + .ps_intr_08 (1'b0), + .ps_intr_09 (1'b0), + .ps_intr_10 (1'b0), + .ps_intr_11 (1'b0), + .ps_intr_12 (1'b0), .spdif (spdif), .adc_clk_p(adc_clk_p), .adc_clk_n(adc_clk_n), @@ -225,14 +216,15 @@ module system_top ( .adc_data_n(adc_data_n), .adc_or_p(adc_or_p), .adc_or_n(adc_or_n), - .spi_clk_i(1'b0), - .spi_clk_o(spi_sclk), - .spi_csn_i(1'b1), - .spi_csn_adc_o(spi_csn_adc), - .spi_csn_clk_o(spi_csn_clk), - .spi_mosi_i(spi_mosi), - .spi_mosi_o(spi_mosi), - .spi_miso_i(spi_miso)); + .spi0_clk_i (1'b0), + .spi0_clk_o (spi_clk), + .spi0_csn_0_o (spi_csn_adc), + .spi0_csn_1_o (spi_csn_clk), + .spi0_csn_2_o (), + .spi0_csn_i (1'b1), + .spi0_sdi_i (spi_miso), + .spi0_sdo_i (1'b0), + .spi0_sdo_o (spi_mosi)); endmodule