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alt_ifconv: Remove unused IP

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Istvan Csomortani 2018-08-14 11:50:44 +01:00 committed by István Csomortáni
parent d5e5fcf17a
commit 84bd50d437
4 changed files with 0 additions and 107 deletions
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2
library/Makefile
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@ -64,7 +64,6 @@ clean:
$(MAKE) -C intel/avl_adxphy clean $(MAKE) -C intel/avl_adxphy clean
$(MAKE) -C intel/avl_dacfifo clean $(MAKE) -C intel/avl_dacfifo clean
$(MAKE) -C intel/axi_adxcvr clean $(MAKE) -C intel/axi_adxcvr clean
$(MAKE) -C intel/common/alt_ifconv clean
$(MAKE) -C intel/common/alt_mem_asym clean $(MAKE) -C intel/common/alt_mem_asym clean
$(MAKE) -C intel/common/alt_serdes clean $(MAKE) -C intel/common/alt_serdes clean
$(MAKE) -C intel/jesd204_phy clean $(MAKE) -C intel/jesd204_phy clean
@ -174,7 +173,6 @@ lib:
$(MAKE) -C intel/avl_adxphy $(MAKE) -C intel/avl_adxphy
$(MAKE) -C intel/avl_dacfifo $(MAKE) -C intel/avl_dacfifo
$(MAKE) -C intel/axi_adxcvr $(MAKE) -C intel/axi_adxcvr
$(MAKE) -C intel/common/alt_ifconv
$(MAKE) -C intel/common/alt_mem_asym $(MAKE) -C intel/common/alt_mem_asym
$(MAKE) -C intel/common/alt_serdes $(MAKE) -C intel/common/alt_serdes
$(MAKE) -C intel/jesd204_phy $(MAKE) -C intel/jesd204_phy

11
library/intel/common/alt_ifconv/Makefile
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@ -1,11 +0,0 @@
####################################################################################
## Copyright 2018(c) Analog Devices, Inc.
## Auto-generated, do not modify!
####################################################################################
LIBRARY_NAME := alt_ifconv
INTEL_DEPS += alt_ifconv.v
INTEL_DEPS += alt_ifconv_hw.tcl
include ../../../scripts/library.mk

60
library/intel/common/alt_ifconv/alt_ifconv.v
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@ -1,60 +0,0 @@
// ***************************************************************************
// ***************************************************************************
// Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
//
// In this HDL repository, there are many different and unique modules, consisting
// of various HDL (Verilog or VHDL) components. The individual modules are
// developed independently, and may be accompanied by separate and unique license
// terms.
//
// The user should read each of these license terms, and understand the
// freedoms and responsibilities that he or she has by using this source/core.
//
// This core is distributed in the hope that it will be useful, but WITHOUT ANY
// WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
// A PARTICULAR PURPOSE.
//
// Redistribution and use of source or resulting binaries, with or without modification
// of this file, are permitted under one of the following two license terms:
//
// 1. The GNU General Public License version 2 as published by the
// Free Software Foundation, which can be found in the top level directory
// of this repository (LICENSE_GPL2), and also online at:
// <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
//
// OR
//
// 2. An ADI specific BSD license, which can be found in the top level directory
// of this repository (LICENSE_ADIBSD), and also on-line at:
// https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
// This will allow to generate bit files and not release the source code,
// as long as it attaches to an ADI device.
//
// ***************************************************************************
// ***************************************************************************
`timescale 1ns/100ps
module alt_ifconv #(
// parameters
parameter WIDTH = 1,
parameter INTERFACE_NAME_IN = "input-interface-name",
parameter INTERFACE_NAME_OUT = "output-interface-name",
parameter SIGNAL_NAME_IN = "input-signal-name",
parameter SIGNAL_NAME_OUT = "output-signal-name") (
// bad tools - ugly stuff
input [(WIDTH-1):0] din,
output [(WIDTH-1):0] dout);
// avoiding qsys signal conflicts
assign dout = din;
endmodule
// ***************************************************************************
// ***************************************************************************

34
library/intel/common/alt_ifconv/alt_ifconv_hw.tcl
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@ -1,34 +0,0 @@
package require qsys
source ../../../scripts/adi_env.tcl
source $ad_hdl_dir/library/scripts/adi_ip_intel.tcl
ad_ip_create alt_ifconv {Altera Interface Translator} alt_ifconv_elab
ad_ip_files alt_ifconv { \
$ad_hdl_dir/library/intel/common/alt_ifconv/alt_ifconv.v \
}
# parameters
ad_ip_parameter DEVICE_FAMILY STRING {Arria 10}
ad_ip_parameter WIDTH INTEGER 1
ad_ip_parameter INTERFACE_NAME_IN STRING {input-interface-name}
ad_ip_parameter INTERFACE_NAME_OUT STRING {output-interface-name}
ad_ip_parameter SIGNAL_NAME_IN STRING {input-signal-name}
ad_ip_parameter SIGNAL_NAME_OUT STRING {output-signal-name}
proc alt_ifconv_elab {} {
set m_width [get_parameter_value "WIDTH"]
set m_if_name_in [get_parameter_value "INTERFACE_NAME_IN"]
set m_if_name_out [get_parameter_value "INTERFACE_NAME_OUT"]
set m_sig_name_in [get_parameter_value "SIGNAL_NAME_IN"]
set m_sig_name_out [get_parameter_value "SIGNAL_NAME_OUT"]
add_interface $m_if_name_in conduit end
add_interface_port $m_if_name_in din $m_sig_name_in input $m_width
add_interface $m_if_name_out conduit end
add_interface_port $m_if_name_out dout $m_sig_name_out output $m_width
}