diff --git a/projects/fmcjesdadc1/common/fmcjesdadc1_bd.tcl b/projects/fmcjesdadc1/common/fmcjesdadc1_bd.tcl
index d12944eb0..eb09ce3c8 100644
--- a/projects/fmcjesdadc1/common/fmcjesdadc1_bd.tcl
+++ b/projects/fmcjesdadc1/common/fmcjesdadc1_bd.tcl
@@ -1,11 +1,19 @@
+#
+# Parameter description:
+#   RX_JESD_M : Number of converters per link
+#   RX_JESD_L : Number of lanes per link
+#   RX_JESD_S : Number of samples per frame
+#   RX_JESD_NP : Number of bits per sample
+#
 
 # RX parameters for each converter
-set RX_NUM_OF_LANES 4      ; # L
-set RX_NUM_OF_CONVERTERS 4 ; # M
-set RX_SAMPLES_PER_FRAME 1 ; # S
-set RX_SAMPLE_WIDTH 16     ; # N/NP
+set RX_NUM_OF_LANES $ad_project_params(RX_JESD_L)      ; # L
+set RX_NUM_OF_CONVERTERS $ad_project_params(RX_JESD_M) ; # M
+set RX_SAMPLES_PER_FRAME $ad_project_params(RX_JESD_S) ; # S
+set RX_SAMPLE_WIDTH $ad_project_params(RX_JESD_NP)     ; # N/NP
 
-set RX_SAMPLES_PER_CHANNEL 2 ; # L * 32 / (M * N)
+set RX_SAMPLES_PER_CHANNEL [expr ($RX_NUM_OF_LANES*32) / ($RX_NUM_OF_CONVERTERS*$RX_SAMPLE_WIDTH)] ; # L * 32 / (M * N)
+set ADC_DMA_DATA_WIDTH [expr $RX_SAMPLE_WIDTH*$RX_NUM_OF_CONVERTERS*$RX_SAMPLES_PER_CHANNEL]
 
 source $ad_hdl_dir/library/jesd204/scripts/jesd204.tcl
 
@@ -43,8 +51,8 @@ ad_ip_parameter axi_ad9250_dma CONFIG.SYNC_TRANSFER_START 1
 ad_ip_parameter axi_ad9250_dma CONFIG.DMA_LENGTH_WIDTH 24
 ad_ip_parameter axi_ad9250_dma CONFIG.DMA_2D_TRANSFER 0
 ad_ip_parameter axi_ad9250_dma CONFIG.CYCLIC 0
-ad_ip_parameter axi_ad9250_dma CONFIG.DMA_DATA_WIDTH_SRC 128
-ad_ip_parameter axi_ad9250_dma CONFIG.DMA_DATA_WIDTH_DEST 128
+ad_ip_parameter axi_ad9250_dma CONFIG.DMA_DATA_WIDTH_SRC $ADC_DMA_DATA_WIDTH
+ad_ip_parameter axi_ad9250_dma CONFIG.DMA_DATA_WIDTH_DEST $ADC_DMA_DATA_WIDTH
 ad_ip_parameter axi_ad9250_dma CONFIG.FIFO_SIZE 8
 
 # transceiver core
@@ -55,7 +63,7 @@ ad_ip_parameter util_fmcjesdadc1_xcvr CONFIG.CPLL_FBDIV 2
 ad_ip_parameter util_fmcjesdadc1_xcvr CONFIG.TX_NUM_OF_LANES 0
 ad_ip_parameter util_fmcjesdadc1_xcvr CONFIG.TX_OUT_DIV 1
 ad_ip_parameter util_fmcjesdadc1_xcvr CONFIG.TX_CLK25_DIV 10
-ad_ip_parameter util_fmcjesdadc1_xcvr CONFIG.RX_NUM_OF_LANES $RX_NUM_OF_LANES
+ad_ip_parameter util_fmcjesdadc1_xcvr CONFIG.RX_NUM_OF_LANES 4
 ad_ip_parameter util_fmcjesdadc1_xcvr CONFIG.RX_OUT_DIV 1
 ad_ip_parameter util_fmcjesdadc1_xcvr CONFIG.RX_CLK25_DIV 10
 ad_ip_parameter util_fmcjesdadc1_xcvr CONFIG.RX_DFE_LPM_CFG 0x0904
@@ -77,15 +85,30 @@ create_bd_port -dir O rx_core_clk
 
 # connections (adc)
 
-ad_xcvrcon  util_fmcjesdadc1_xcvr axi_ad9250_xcvr axi_ad9250_jesd
+if {$RX_NUM_OF_LANES == 2} {
+    # The ad-fmcjesdadc1-ebz board contains two ad9250 chips each exposing a 
+    # maximum of two JESD204B physical lanes. 
+    # When the user configures the JESD204B interface for 4 lanes communication
+    # (two lanes per ad9250 chip) the A and B lanes contain information from the
+    # first chip and the C nd D lanes contain information from the second chip. 
+    # When the user configures the JESD204B interface for 2 lanes communication
+    # (1 lane per ad9250 chip) only one lane from ech ad9250 chip will be used.
+    # So only physical lanes A and C will contain usable information, thus the need to
+    # swap of the lanes "{0 2}": This means that JESD204B link layer 0 will be 
+    # connected to the JESD204B physical lane 0 and JESD204B link layer 1 will be
+    # connected to the JESD204B physical lane 2.  
+    ad_xcvrcon  util_fmcjesdadc1_xcvr axi_ad9250_xcvr axi_ad9250_jesd {0 2}
+} else {
+    ad_xcvrcon  util_fmcjesdadc1_xcvr axi_ad9250_xcvr axi_ad9250_jesd 
+}
 ad_connect  util_fmcjesdadc1_xcvr/rx_out_clk_0 rx_core_clk
 
 ad_connect axi_ad9250_core/adc_valid_0 axi_ad9250_cpack/fifo_wr_en
 
-ad_connect axi_ad9250_core/adc_enable_0 axi_ad9250_cpack/enable_0
-ad_connect axi_ad9250_core/adc_enable_1 axi_ad9250_cpack/enable_1
-ad_connect axi_ad9250_core/adc_enable_2 axi_ad9250_cpack/enable_2
-ad_connect axi_ad9250_core/adc_enable_3 axi_ad9250_cpack/enable_3
+for {set i 0} {$i < $RX_NUM_OF_CONVERTERS} {incr i} {
+  ad_connect axi_ad9250_core/adc_enable_$i axi_ad9250_cpack/enable_$i
+  ad_connect axi_ad9250_core/adc_data_$i axi_ad9250_cpack/fifo_wr_data_$i
+}
 
 ad_connect  util_fmcjesdadc1_xcvr/rx_out_clk_0 axi_ad9250_core/link_clk
 ad_connect  axi_ad9250_jesd/rx_sof axi_ad9250_core/link_sof
@@ -95,10 +118,6 @@ ad_connect  util_fmcjesdadc1_xcvr/rx_out_clk_0 axi_ad9250_cpack/clk
 ad_connect  axi_ad9250_jesd_rstgen/peripheral_reset axi_ad9250_cpack/reset
 
 ad_connect  axi_ad9250_core/adc_dovf axi_ad9250_cpack/fifo_wr_overflow
-ad_connect  axi_ad9250_core/adc_data_0 axi_ad9250_cpack/fifo_wr_data_0
-ad_connect  axi_ad9250_core/adc_data_1 axi_ad9250_cpack/fifo_wr_data_1
-ad_connect  axi_ad9250_core/adc_data_2 axi_ad9250_cpack/fifo_wr_data_2
-ad_connect  axi_ad9250_core/adc_data_3 axi_ad9250_cpack/fifo_wr_data_3
 
 ad_connect  axi_ad9250_core/link_clk axi_ad9250_dma/fifo_wr_clk
 ad_connect  axi_ad9250_dma/fifo_wr axi_ad9250_cpack/packed_fifo_wr
@@ -129,3 +148,20 @@ ad_connect  $sys_dma_resetn axi_ad9250_dma/m_dest_axi_aresetn
 ad_cpu_interrupt ps-11 mb-14 axi_ad9250_jesd/irq
 ad_cpu_interrupt ps-13 mb-13 axi_ad9250_dma/irq
 
+# Create dummy outputs for unused Rx lanes
+for {set i $RX_NUM_OF_LANES} {$i < 4} {incr i} {
+    create_bd_port -dir I rx_data_${i}_n
+    create_bd_port -dir I rx_data_${i}_p
+}
+
+# Connect unused input pins in util_fmcjesdadc1_xcvr
+if {$RX_NUM_OF_LANES == 2} {
+    ad_connect util_fmcjesdadc1_xcvr/rx_clk_1 util_fmcjesdadc1_xcvr/rx_clk_0
+    ad_connect util_fmcjesdadc1_xcvr/rx_clk_3 util_fmcjesdadc1_xcvr/rx_clk_0
+    ad_connect util_fmcjesdadc1_xcvr/rx_2_p rx_data_2_p
+    ad_connect util_fmcjesdadc1_xcvr/rx_2_n rx_data_2_n
+    ad_connect util_fmcjesdadc1_xcvr/rx_3_p rx_data_3_p
+    ad_connect util_fmcjesdadc1_xcvr/rx_3_n rx_data_3_n
+    ad_connect util_fmcjesdadc1_xcvr/rx_calign_1 util_fmcjesdadc1_xcvr/rx_calign_0
+    ad_connect util_fmcjesdadc1_xcvr/rx_calign_3 util_fmcjesdadc1_xcvr/rx_calign_0
+}
diff --git a/projects/fmcjesdadc1/kc705/system_project.tcl b/projects/fmcjesdadc1/kc705/system_project.tcl
index 5ed8177e8..befbd6b1e 100644
--- a/projects/fmcjesdadc1/kc705/system_project.tcl
+++ b/projects/fmcjesdadc1/kc705/system_project.tcl
@@ -3,7 +3,28 @@ source ../../scripts/adi_env.tcl
 source $ad_hdl_dir/projects/scripts/adi_board.tcl
 source $ad_hdl_dir/projects/scripts/adi_project_xilinx.tcl
 
-adi_project fmcjesdadc1_kc705
+# get_env_param retrieves parameter value from the environment if exists,
+# other case use the default value
+#
+#   Use over-writable parameters from the environment.
+#
+#    e.g.
+#      make RX_JESD_L=4 RX_JESD_M=2
+#      make RX_JESD_L=4 RX_JESD_M=4 
+
+# Parameter description:
+#   RX_JESD_M : Number of converters per link
+#   RX_JESD_L : Number of lanes per link
+#   RX_JESD_S : Number of samples per frame
+#   RX_JESD_NP : Number of bits per sample
+
+adi_project fmcjesdadc1_kc705 0 [list \
+  RX_JESD_M    [get_env_param RX_JESD_M    4 ] \
+  RX_JESD_L    [get_env_param RX_JESD_L    4 ] \
+  RX_JESD_S    [get_env_param RX_JESD_S    1 ] \
+  RX_JESD_NP   [get_env_param RX_JESD_NP   16] \
+]
+
 adi_project_files fmcjesdadc1_kc705 [list \
   "../common/fmcjesdadc1_spi.v" \
   "system_top.v" \
diff --git a/projects/fmcjesdadc1/vc707/system_project.tcl b/projects/fmcjesdadc1/vc707/system_project.tcl
index 04114c834..60971b303 100644
--- a/projects/fmcjesdadc1/vc707/system_project.tcl
+++ b/projects/fmcjesdadc1/vc707/system_project.tcl
@@ -3,7 +3,28 @@ source ../../scripts/adi_env.tcl
 source $ad_hdl_dir/projects/scripts/adi_project_xilinx.tcl
 source $ad_hdl_dir/projects/scripts/adi_board.tcl
 
-adi_project fmcjesdadc1_vc707
+# get_env_param retrieves parameter value from the environment if exists,
+# other case use the default value
+#
+#   Use over-writable parameters from the environment.
+#
+#    e.g.
+#      make RX_JESD_L=4 RX_JESD_M=2
+#      make RX_JESD_L=4 RX_JESD_M=4  
+
+# Parameter description:
+#   RX_JESD_M : Number of converters per link
+#   RX_JESD_L : Number of lanes per link
+#   RX_JESD_S : Number of samples per frame
+#   RX_JESD_NP : Number of bits per sample
+
+adi_project fmcjesdadc1_vc707 0 [list \
+  RX_JESD_M    [get_env_param RX_JESD_M    4 ] \
+  RX_JESD_L    [get_env_param RX_JESD_L    4 ] \
+  RX_JESD_S    [get_env_param RX_JESD_S    1 ] \
+  RX_JESD_NP   [get_env_param RX_JESD_NP   16] \
+]
+
 adi_project_files fmcjesdadc1_vc707 [list \
   "$ad_hdl_dir/library/common/ad_iobuf.v" \
   "$ad_hdl_dir/library/common/ad_sysref_gen.v" \
diff --git a/projects/fmcjesdadc1/zc706/system_project.tcl b/projects/fmcjesdadc1/zc706/system_project.tcl
index 896199138..999c5545f 100644
--- a/projects/fmcjesdadc1/zc706/system_project.tcl
+++ b/projects/fmcjesdadc1/zc706/system_project.tcl
@@ -3,7 +3,28 @@ source ../../scripts/adi_env.tcl
 source $ad_hdl_dir/projects/scripts/adi_project_xilinx.tcl
 source $ad_hdl_dir/projects/scripts/adi_board.tcl
 
-adi_project fmcjesdadc1_zc706
+# get_env_param retrieves parameter value from the environment if exists,
+# other case use the default value
+#
+#   Use over-writable parameters from the environment.
+#
+#    e.g.
+#      make RX_JESD_L=4 RX_JESD_M=2
+#      make RX_JESD_L=4 RX_JESD_M=4  
+
+# Parameter description:
+#   RX_JESD_M : Number of converters per link
+#   RX_JESD_L : Number of lanes per link
+#   RX_JESD_S : Number of samples per frame
+#   RX_JESD_NP : Number of bits per sample
+
+adi_project fmcjesdadc1_zc706 0 [list \
+  RX_JESD_M    [get_env_param RX_JESD_M    4 ] \
+  RX_JESD_L    [get_env_param RX_JESD_L    4 ] \
+  RX_JESD_S    [get_env_param RX_JESD_S    1 ] \
+  RX_JESD_NP   [get_env_param RX_JESD_NP   16] \
+]
+
 adi_project_files fmcjesdadc1_zc706 [list \
   "$ad_hdl_dir/library/common/ad_iobuf.v" \
   "$ad_hdl_dir/library/common/ad_sysref_gen.v" \