util_gtlb: use gpio
parent
a0039ed4fe
commit
88f247a1de
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@ -123,10 +123,8 @@ module util_gtlb (
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input up_clk,
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input up_rstn,
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input up_pn_err_clr,
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input up_pn_oos_clr,
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output reg up_pn_err,
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output reg up_pn_oos);
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input [31;0] up_gp_in;
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output [31;0] up_gp_out);
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// internal registers
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@ -145,6 +143,8 @@ module util_gtlb (
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reg [ 3:0] rx_pn_oos_count = 'd0;
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reg up_pn_err_clr_d = 'd0;
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reg up_pn_oos_clr_d = 'd0;
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reg up_pn_err = 'd0;
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reg up_pn_oos = 'd0;
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// internal signals
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@ -155,6 +155,8 @@ module util_gtlb (
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wire rx_pn_match_s;
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wire rx_pn_update_s;
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wire rx_pn_err_s;
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wire up_pn_err_clr_s;
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wire up_pn_oos_clr_s;
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wire up_pn_err_s;
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wire up_pn_oos_s;
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@ -333,6 +335,13 @@ module util_gtlb (
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// up clock
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assign up_pn_err_clr_s = up_gp_in[1];
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assign up_pn_oos_clr_s = up_gp_in[0];
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assign up_gp_out[31:2] = 30'd0;
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assign up_gp_out[1] = up_pn_err;
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assign up_gp_out[0] = up_pn_oos;
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up_xfer_status #(.DATA_WIDTH(2)) i_xfer_status (
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.up_rstn (up_rstn),
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.up_clk (up_clk),
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@ -348,17 +357,17 @@ module util_gtlb (
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up_pn_err <= 'd0;
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up_pn_oos <= 'd0;
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end else begin
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up_pn_err_clr_d <= up_pn_err_clr;
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up_pn_oos_clr_d <= up_pn_oos_clr;
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up_pn_err_clr_d <= up_pn_err_clr_s;
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up_pn_oos_clr_d <= up_pn_oos_clr_s;
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if (up_pn_err_s == 1'b1) begin
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up_pn_err <= 1'b1;
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end else if ((up_pn_err_clr == 1'b1) &&
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end else if ((up_pn_err_clr_s == 1'b1) &&
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(up_pn_err_clr_d == 1'b0)) begin
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up_pn_err <= 1'b0;
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end
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if (up_pn_oos_s == 1'b1) begin
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up_pn_oos <= 1'b1;
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end else if ((up_pn_oos_clr == 1'b1) &&
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end else if ((up_pn_oos_clr_s == 1'b1) &&
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(up_pn_oos_clr_d == 1'b0)) begin
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up_pn_oos <= 1'b0;
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end
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