common/tb/ad_pack_tb: Add non random scenario as first test for easier debug
parent
d20e604864
commit
8905147698
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@ -31,14 +31,14 @@ module ad_pack_tb;
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.odata(odata),
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.odata(odata),
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.ovalid(ovalid));
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.ovalid(ovalid));
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task test();
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task test(input random_n);
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begin
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begin
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@(posedge clk);
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@(posedge clk);
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i = 0;
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i = 0;
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j = 0;
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j = 0;
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while (i < (VECT_W/(I_W*UNIT_W) + (VECT_W%(I_W*UNIT_W)>0))) begin
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while (i < (VECT_W/(I_W*UNIT_W) + (VECT_W%(I_W*UNIT_W)>0))) begin
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@(posedge clk);
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@(posedge clk);
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if ($urandom % 2 == 0) begin
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if ($urandom % 2 == 0 | random_n) begin
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idata <= input_vector[i*(I_W*UNIT_W) +: (I_W*UNIT_W)];
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idata <= input_vector[i*(I_W*UNIT_W) +: (I_W*UNIT_W)];
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ivalid <= 1'b1;
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ivalid <= 1'b1;
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i = i + 1;
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i = i + 1;
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@ -59,6 +59,11 @@ module ad_pack_tb;
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$display("i=%d Expected=%x Found=%x",i,input_vector[i*8+:8],output_vector[i*8+:8]);
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$display("i=%d Expected=%x Found=%x",i,input_vector[i*8+:8],output_vector[i*8+:8]);
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end
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end
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end
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end
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// Clear output vector
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for (i=0; i<VECT_W/8; i=i+1) begin
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output_vector[i*8+:8] = 8'bx;
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end
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end
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end
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endtask
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endtask
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@ -71,7 +76,12 @@ module ad_pack_tb;
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input_vector[i*8+:8] = i[7:0];
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input_vector[i*8+:8] = i[7:0];
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end
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end
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test();
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test(1);
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do_trigger_reset();
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@(negedge reset);
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test(0);
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do_trigger_reset();
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do_trigger_reset();
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@(negedge reset);
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@(negedge reset);
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@ -81,7 +91,7 @@ module ad_pack_tb;
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input_vector[i*8+:8] = $urandom;
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input_vector[i*8+:8] = $urandom;
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end
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end
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test();
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test(0);
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end
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end
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