library & projects- ad_lvds/ad_data replace

main
Rejeesh Kutty 2017-07-26 10:31:48 -04:00
parent d4820dd55a
commit 893af8d3e6
10 changed files with 15 additions and 17 deletions

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@ -97,7 +97,7 @@ module axi_ad9265_if #(
generate
for (l_inst = 0; l_inst <= 7; l_inst = l_inst + 1) begin : g_adc_if
ad_lvds_in #(
ad_data_in #(
.DEVICE_TYPE (DEVICE_TYPE),
.IODELAY_CTRL (0),
.IODELAY_GROUP (IO_DELAY_GROUP))
@ -119,7 +119,7 @@ module axi_ad9265_if #(
// over-range interface
ad_lvds_in #(
ad_data_in #(
.DEVICE_TYPE (DEVICE_TYPE),
.IODELAY_CTRL (1),
.IODELAY_GROUP (IO_DELAY_GROUP))
@ -139,7 +139,7 @@ module axi_ad9265_if #(
// clock
ad_lvds_clk #(
ad_data_clk #(
.DEVICE_TYPE (DEVICE_TYPE))
i_adc_clk (
.rst (1'b0),

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@ -6,8 +6,8 @@ source $ad_hdl_dir/library/scripts/adi_ip.tcl
adi_ip_create axi_ad9265
adi_ip_files axi_ad9265 [list \
"$ad_hdl_dir/library/common/ad_rst.v" \
"$ad_hdl_dir/library/xilinx/common/ad_lvds_clk.v" \
"$ad_hdl_dir/library/xilinx/common/ad_lvds_in.v" \
"$ad_hdl_dir/library/xilinx/common/ad_data_clk.v" \
"$ad_hdl_dir/library/xilinx/common/ad_data_in.v" \
"$ad_hdl_dir/library/common/ad_datafmt.v" \
"$ad_hdl_dir/library/common/ad_dcfilter.v" \
"$ad_hdl_dir/library/common/ad_pnmon.v" \

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@ -127,7 +127,7 @@ module axi_ad9467_if #(
generate
for (l_inst = 0; l_inst <= 7; l_inst = l_inst + 1) begin : g_adc_if
ad_lvds_in #(
ad_data_in #(
.DEVICE_TYPE (DEVICE_TYPE),
.IODELAY_CTRL (0),
.IODELAY_GROUP (IO_DELAY_GROUP))
@ -149,7 +149,7 @@ module axi_ad9467_if #(
// over-range interface
ad_lvds_in #(
ad_data_in #(
.DEVICE_TYPE (DEVICE_TYPE),
.IODELAY_CTRL (1),
.IODELAY_GROUP (IO_DELAY_GROUP))
@ -169,7 +169,7 @@ module axi_ad9467_if #(
// clock
ad_lvds_clk #(
ad_data_clk #(
.DEVICE_TYPE (DEVICE_TYPE))
i_adc_clk (
.rst (1'b0),

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@ -6,8 +6,8 @@ source $ad_hdl_dir/library/scripts/adi_ip.tcl
adi_ip_create axi_ad9467
adi_ip_files axi_ad9467 [list \
"$ad_hdl_dir/library/common/ad_rst.v" \
"$ad_hdl_dir/library/xilinx/common/ad_lvds_clk.v" \
"$ad_hdl_dir/library/xilinx/common/ad_lvds_in.v" \
"$ad_hdl_dir/library/xilinx/common/ad_data_clk.v" \
"$ad_hdl_dir/library/xilinx/common/ad_data_in.v" \
"$ad_hdl_dir/library/common/ad_datafmt.v" \
"$ad_hdl_dir/library/common/ad_pnmon.v" \
"$ad_hdl_dir/library/common/up_xfer_status.v" \

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@ -151,7 +151,7 @@ module axi_ad9963_if #(
generate
for (l_inst = 0; l_inst <= 11; l_inst = l_inst + 1) begin: g_rx_data
ad_lvds_in #(
ad_data_in #(
.SINGLE_ENDED (1),
.DEVICE_TYPE (DEVICE_TYPE),
.IODELAY_ENABLE (ADC_IODELAY_ENABLE),
@ -175,7 +175,7 @@ module axi_ad9963_if #(
// receive iq interface, ibuf -> idelay -> iddr
ad_lvds_in #(
ad_data_in #(
.SINGLE_ENDED (1),
.DEVICE_TYPE (DEVICE_TYPE),
.IODELAY_ENABLE (ADC_IODELAY_ENABLE),

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@ -10,7 +10,7 @@ adi_ip_files axi_ad9963 [list \
"$ad_hdl_dir/library/xilinx/common/up_xfer_status_constr.xdc" \
"$ad_hdl_dir/library/xilinx/common/up_clock_mon_constr.xdc" \
"$ad_hdl_dir/library/common/ad_rst.v" \
"$ad_hdl_dir/library/xilinx/common/ad_lvds_in.v" \
"$ad_hdl_dir/library/xilinx/common/ad_data_in.v" \
"$ad_hdl_dir/library/xilinx/common/ad_mul.v" \
"$ad_hdl_dir/library/common/ad_pnmon.v" \
"$ad_hdl_dir/library/common/ad_dds_sine.v" \

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@ -756,7 +756,7 @@ module axi_fmcadc5_sync #(parameter integer ID = 0) (
assign rx_sysref = rx_sysref_i;
ad_lvds_out #(
ad_data_out #(
.DEVICE_TYPE (0),
.SINGLE_ENDED (0),
.IODELAY_ENABLE (1),

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@ -5,7 +5,7 @@ source $ad_hdl_dir/library/scripts/adi_ip.tcl
adi_ip_create axi_fmcadc5_sync
adi_ip_files axi_fmcadc5_sync [list \
"$ad_hdl_dir/library/xilinx/common/ad_lvds_out.v" \
"$ad_hdl_dir/library/xilinx/common/ad_data_out.v" \
"$ad_hdl_dir/library/xilinx/common/ad_mul.v" \
"$ad_hdl_dir/library/common/up_axi.v" \
"axi_fmcadc5_sync_constr.xdc" \

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@ -8,7 +8,6 @@ adi_project_files fmcadc2_zc706 [list \
"../common/fmcadc2_spi.v" \
"system_top.v" \
"system_constr.xdc" \
"$ad_hdl_dir/library/xilinx/common/ad_lvds_out.v" \
"$ad_hdl_dir/library/xilinx/common/ad_iobuf.v" \
"$ad_hdl_dir/library/common/ad_sysref_gen.v" \
"$ad_hdl_dir/projects/common/zc706/zc706_plddr3_constr.xdc" \

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@ -8,7 +8,6 @@ source $ad_hdl_dir/projects/scripts/adi_board.tcl
adi_project_xilinx fmcadc5_vc707
adi_project_files fmcadc5_vc707 [list \
"$ad_hdl_dir/projects/common/vc707/vc707_system_constr.xdc" \
"$ad_hdl_dir/library/xilinx/common/ad_lvds_out.v" \
"$ad_hdl_dir/library/xilinx/common/ad_iobuf.v" \
"$ad_hdl_dir/library/common/ad_sysref_gen.v" \
"../common/fmcadc5_spi.v" \