From 89964be59e8612c121e678567b66d9eccb5cfaf2 Mon Sep 17 00:00:00 2001 From: Adrian Costina Date: Tue, 30 Sep 2014 10:32:18 +0300 Subject: [PATCH] fmcomms1: Updated project to vivado 2014.2 --- projects/fmcomms1/common/fmcomms1_bd.tcl | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/projects/fmcomms1/common/fmcomms1_bd.tcl b/projects/fmcomms1/common/fmcomms1_bd.tcl index dd5d21ce5..5ea44b388 100644 --- a/projects/fmcomms1/common/fmcomms1_bd.tcl +++ b/projects/fmcomms1/common/fmcomms1_bd.tcl @@ -241,7 +241,8 @@ if {$sys_zynq == 0 } { # ila (adc) - set ila_adc [create_bd_cell -type ip -vlnv xilinx.com:ip:ila:3.0 ila_adc] + set ila_adc [create_bd_cell -type ip -vlnv xilinx.com:ip:ila:4.0 ila_adc] + set_property -dict [list CONFIG.C_MONITOR_TYPE {Native}] $ila_adc set_property -dict [list CONFIG.C_NUM_OF_PROBES {2}] $ila_adc set_property -dict [list CONFIG.C_PROBE0_WIDTH {1}] $ila_adc set_property -dict [list CONFIG.C_PROBE1_WIDTH {64}] $ila_adc @@ -249,8 +250,8 @@ if {$sys_zynq == 0 } { set_property -dict [list CONFIG.C_TRIGIN_EN {false}] $ila_adc connect_bd_net -net sys_200m_clk [get_bd_pins ila_adc/clk] - connect_bd_net -net axi_ad9643_dma_dwr [get_bd_pins ila_adc/probe0] - connect_bd_net -net axi_ad9643_dma_ddata [get_bd_pins ila_adc/probe1] + connect_bd_net -net axi_ad9643_dma_dwr [get_bd_pins ila_adc/PROBE0] + connect_bd_net -net axi_ad9643_dma_ddata [get_bd_pins ila_adc/PROBE1] # reference clock