fmcomms1: Updated project to vivado 2014.2

main
Adrian Costina 2014-09-30 10:32:18 +03:00
parent 041d8faaf7
commit 89964be59e
1 changed files with 4 additions and 3 deletions

View File

@ -241,7 +241,8 @@ if {$sys_zynq == 0 } {
# ila (adc)
set ila_adc [create_bd_cell -type ip -vlnv xilinx.com:ip:ila:3.0 ila_adc]
set ila_adc [create_bd_cell -type ip -vlnv xilinx.com:ip:ila:4.0 ila_adc]
set_property -dict [list CONFIG.C_MONITOR_TYPE {Native}] $ila_adc
set_property -dict [list CONFIG.C_NUM_OF_PROBES {2}] $ila_adc
set_property -dict [list CONFIG.C_PROBE0_WIDTH {1}] $ila_adc
set_property -dict [list CONFIG.C_PROBE1_WIDTH {64}] $ila_adc
@ -249,8 +250,8 @@ if {$sys_zynq == 0 } {
set_property -dict [list CONFIG.C_TRIGIN_EN {false}] $ila_adc
connect_bd_net -net sys_200m_clk [get_bd_pins ila_adc/clk]
connect_bd_net -net axi_ad9643_dma_dwr [get_bd_pins ila_adc/probe0]
connect_bd_net -net axi_ad9643_dma_ddata [get_bd_pins ila_adc/probe1]
connect_bd_net -net axi_ad9643_dma_dwr [get_bd_pins ila_adc/PROBE0]
connect_bd_net -net axi_ad9643_dma_ddata [get_bd_pins ila_adc/PROBE1]
# reference clock