fmcomms1: KC705 project updated to the latest framework
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11379939d0
commit
89b83f8a00
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@ -1,4 +1,5 @@
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source $ad_hdl_dir/projects/common/kc705/kc705_system_bd.tcl
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source $ad_hdl_dir/projects/common/xilinx/sys_wfifo.tcl
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source ../common/fmcomms1_bd.tcl
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@ -86,5 +86,3 @@ create_clock -name dac_clk_in -period 2.00 [get_ports dac_clk_in_p]
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create_clock -name adc_clk_in -period 4.00 [get_ports adc_clk_in_p]
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create_clock -name dac_div_clk -period 8.00 [get_pins i_system_wrapper/system_i/axi_ad9122/dac_div_clk]
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set_false_path -from [get_pins i_system_wrapper/system_i/axi_ad9643_dma/inst/i_request_arb/i_src_dma_fifo/overflow_reg/C] \
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-to [get_pins i_system_wrapper/system_i/sys_wfifo/wfifo_ctl/inst/m_wovf_m1_reg/D]
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@ -1,13 +1,13 @@
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source ../../scripts/adi_env.tcl
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source $ad_hdl_dir/projects/scripts/adi_project.tcl
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source $ad_hdl_dir/projects/scripts/adi_board.tcl
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adi_project_create fmcomms1_kc705
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adi_project_files fmcomms1_kc705 [list \
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"system_top.v" \
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"system_constr.xdc"\
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"$ad_hdl_dir/library/common/ad_iobuf.v" \
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"$ad_hdl_dir/projects/common/kc705/kc705_system_constr.xdc" ]
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set_property PROCESSING_ORDER EARLY [get_files $ad_hdl_dir/projects/common/kc705/kc705_system_constr.xdc]
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@ -89,8 +89,7 @@ module system_top (
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fan_pwm,
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gpio_lcd,
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gpio_led,
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gpio_sw,
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gpio_bd,
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iic_rstn,
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iic_scl,
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@ -113,15 +112,7 @@ module system_top (
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adc_data_in_n,
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ref_clk_out_p,
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ref_clk_out_n,
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hdmi_out_clk,
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hdmi_hsync,
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hdmi_vsync,
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hdmi_data_e,
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hdmi_data,
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spdif);
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ref_clk_out_n);
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input sys_rst;
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input sys_clk_p;
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@ -171,8 +162,7 @@ module system_top (
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output fan_pwm;
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inout [ 6:0] gpio_lcd;
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inout [ 7:0] gpio_led;
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inout [ 8:0] gpio_sw;
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inout [16:0] gpio_bd;
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output iic_rstn;
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inout iic_scl;
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@ -197,14 +187,6 @@ module system_top (
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output ref_clk_out_p;
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output ref_clk_out_n;
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output hdmi_out_clk;
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output hdmi_hsync;
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output hdmi_vsync;
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output hdmi_data_e;
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output [15:0] hdmi_data;
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output spdif;
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// internal registers
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reg [63:0] dac_ddata_0 = 'd0;
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@ -216,6 +198,13 @@ module system_top (
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// internal signals
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wire [63:0] gpio_i;
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wire [63:0] gpio_o;
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wire [63:0] gpio_t;
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wire [ 7:0] spi_csn;
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wire spi_clk;
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wire spi_mosi;
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wire spi_miso;
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wire dac_clk;
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wire dac_valid_0;
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wire dac_enable_0;
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@ -231,7 +220,13 @@ module system_top (
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wire [15:0] adc_data_1;
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wire ref_clk;
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wire oddr_ref_clk;
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wire [31:0] mb_intrs;
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// default logic
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assign ddr3_1_p = 2'b11;
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assign ddr3_1_n = 3'b000;
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assign fan_pwm = 1'b1;
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assign iic_rstn = 1'b1;
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// instantiations
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@ -283,9 +278,13 @@ module system_top (
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endcase
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end
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ad_iobuf #(.DATA_WIDTH(17)) i_iobuf_bd (
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.dt (gpio_t[16:0]),
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.di (gpio_o[16:0]),
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.do (gpio_i[16:0]),
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.dio (gpio_bd));
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system_wrapper i_system_wrapper (
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.ddr3_1_n (ddr3_1_n),
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.ddr3_1_p (ddr3_1_p),
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.ddr3_addr (ddr3_addr),
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.ddr3_ba (ddr3_ba),
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.ddr3_cas_n (ddr3_cas_n),
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@ -301,10 +300,13 @@ module system_top (
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.ddr3_ras_n (ddr3_ras_n),
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.ddr3_reset_n (ddr3_reset_n),
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.ddr3_we_n (ddr3_we_n),
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.fan_pwm (fan_pwm),
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.gpio0_i (gpio_i[31:0]),
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.gpio0_o (gpio_o[31:0]),
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.gpio0_t (gpio_t[31:0]),
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.gpio1_i (gpio_i[63:32]),
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.gpio1_o (gpio_o[63:32]),
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.gpio1_t (gpio_t[63:32]),
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.gpio_lcd_tri_io (gpio_lcd),
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.gpio_led_tri_io (gpio_led),
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.gpio_sw_tri_io (gpio_sw),
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.adc_clk (adc_clk),
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.adc_clk_in_n (adc_clk_in_n),
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.adc_clk_in_p (adc_clk_in_p),
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@ -312,7 +314,6 @@ module system_top (
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.adc_data_1 (adc_data_1),
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.adc_data_in_n (adc_data_in_n),
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.adc_data_in_p (adc_data_in_p),
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.adc_dma_sync (1'b1),
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.adc_dma_wdata (adc_dma_wdata),
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.adc_dma_wr (adc_dma_wr),
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.adc_enable_0 (adc_enable_0),
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@ -339,38 +340,15 @@ module system_top (
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.dac_valid_0 (dac_valid_0),
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.dac_valid_1 (dac_valid_1),
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.ref_clk (ref_clk),
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.hdmi_data (hdmi_data),
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.hdmi_data_e (hdmi_data_e),
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.hdmi_hsync (hdmi_hsync),
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.hdmi_out_clk (hdmi_out_clk),
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.hdmi_vsync (hdmi_vsync),
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.iic_main_scl_io (iic_scl),
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.iic_main_sda_io (iic_sda),
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.iic_rstn (iic_rstn),
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.mb_intr_10 (mb_intrs[10]),
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.mb_intr_11 (mb_intrs[11]),
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.mb_intr_12 (mb_intrs[12]),
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.mb_intr_13 (mb_intrs[13]),
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.mb_intr_14 (mb_intrs[14]),
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.mb_intr_15 (mb_intrs[15]),
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.mb_intr_16 (mb_intrs[16]),
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.mb_intr_17 (mb_intrs[17]),
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.mb_intr_18 (mb_intrs[18]),
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.mb_intr_19 (mb_intrs[19]),
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.mb_intr_20 (mb_intrs[20]),
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.mb_intr_21 (mb_intrs[21]),
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.mb_intr_22 (mb_intrs[22]),
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.mb_intr_23 (mb_intrs[23]),
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.mb_intr_24 (mb_intrs[24]),
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.mb_intr_25 (mb_intrs[25]),
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.mb_intr_26 (mb_intrs[26]),
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.mb_intr_27 (mb_intrs[27]),
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.mb_intr_28 (mb_intrs[28]),
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.mb_intr_29 (mb_intrs[29]),
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.mb_intr_30 (mb_intrs[30]),
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.mb_intr_31 (mb_intrs[31]),
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.ad9122_dma_irq (mb_intrs[12]),
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.ad9643_dma_irq (mb_intrs[13]),
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.mb_intr_02 (1'd0),
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.mb_intr_03 (1'd0),
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.mb_intr_06 (1'd0),
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.mb_intr_07 (1'd0),
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.mb_intr_08 (1'd0),
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.mb_intr_14 (1'd0),
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.mb_intr_15 (1'd0),
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.mdio_mdc (mdio_mdc),
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.mdio_mdio_io (mdio_mdio_io),
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.mii_col (mii_col),
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@ -389,7 +367,13 @@ module system_top (
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.linear_flash_dq_io (linear_flash_dq_io),
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.linear_flash_oen (linear_flash_oen),
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.linear_flash_wen (linear_flash_wen),
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.spdif (spdif),
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.spi_clk_i (spi_clk),
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.spi_clk_o (spi_clk),
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.spi_csn_i (spi_csn),
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.spi_csn_o (spi_csn),
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.spi_sdi_i (spi_miso),
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.spi_sdo_i (spi_mosi),
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.spi_sdo_o (spi_mosi),
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.sys_clk_n (sys_clk_n),
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.sys_clk_p (sys_clk_p),
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.sys_rst (sys_rst),
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