ad77681evb: Add upscaler to the data path
parent
e782ed06cb
commit
8b671fa7ae
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@ -69,6 +69,7 @@ clean-all:clean
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$(MAKE) -C ../../../library/util_i2c_mixer clean
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$(MAKE) -C ../../../library/util_pulse_gen clean
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ad738x_fmc_zed.sdk/system_top.hdf: $(M_DEPS)
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-rm -rf $(M_FLIST)
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$(M_VIVADO) system_project.tcl >> ad738x_fmc_zed_vivado.log 2>&1
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@ -17,6 +17,9 @@ current_bd_instance /spi_adc1
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create_bd_intf_pin -mode Master -vlnv analog.com:interface:spi_master_rtl:1.0 m_spi
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create_bd_intf_pin -mode Master -vlnv xilinx.com:interface:axis_rtl:1.0 M_AXIS_SAMPLE
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# DATA_WIDTH is set to 8, so the granularity of the transaction will be 8 bit
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# So we can to support 16bit 24bit and 32bit transfers
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ad_ip_instance spi_engine_execution execution
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ad_ip_parameter execution CONFIG.DATA_WIDTH 8
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ad_ip_parameter execution CONFIG.NUM_OF_CS 1
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@ -32,15 +35,26 @@ current_bd_instance /spi_adc1
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ad_ip_instance spi_engine_interconnect interconnect
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ad_ip_parameter interconnect CONFIG.DATA_WIDTH 8
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# to convert the 8bit AXI stream to 24bit AXI stream
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ad_ip_instance axis_dwidth_converter m_axis_samples_24
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ad_ip_parameter m_axis_samples_24 CONFIG.M_TDATA_NUM_BYTES 3
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# upscale the data to 32bit, samples should be multiple of 16bit
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ad_ip_instance util_axis_upscale axis_upscaler
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ad_ip_parameter axis_upscaler CONFIG.NUM_OF_CHANNELS 1
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ad_ip_parameter axis_upscaler CONFIG.DATA_WIDTH 24
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ad_ip_parameter axis_upscaler CONFIG.UDATA_WIDTH 32
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ad_connect axis_upscaler/dfmt_enable GND
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ad_connect axis_upscaler/dfmt_type GND
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ad_connect axis_upscaler/dfmt_se GND
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ad_connect axi_1/spi_engine_offload_ctrl0 offload/spi_engine_offload_ctrl
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ad_connect offload/spi_engine_ctrl interconnect/s0_ctrl
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ad_connect axi_1/spi_engine_ctrl interconnect/s1_ctrl
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ad_connect interconnect/m_ctrl execution/ctrl
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ad_connect offload/offload_sdi m_axis_samples_24/S_AXIS
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ad_connect m_axis_samples_24/M_AXIS M_AXIS_SAMPLE
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ad_connect m_axis_samples_24/M_AXIS axis_upscaler/s_axis
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ad_connect axis_upscaler/m_axis M_AXIS_SAMPLE
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ad_connect execution/spi m_spi
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@ -51,11 +65,13 @@ current_bd_instance /spi_adc1
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ad_connect clk axi_1/spi_clk
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ad_connect clk interconnect/clk
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ad_connect clk m_axis_samples_24/aclk
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ad_connect clk axis_upscaler/clk
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ad_connect axi_1/spi_resetn offload/spi_resetn
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ad_connect axi_1/spi_resetn execution/resetn
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ad_connect axi_1/spi_resetn interconnect/resetn
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ad_connect axi_1/spi_resetn m_axis_samples_24/aresetn
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ad_connect axi_1/spi_resetn axis_upscaler/resetn
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ad_connect drdy offload/trigger
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@ -89,15 +105,26 @@ current_bd_instance /spi_adc2
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ad_ip_instance spi_engine_interconnect interconnect
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ad_ip_parameter interconnect CONFIG.DATA_WIDTH 8
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# to convert the 8bit AXI stream to 24bit AXI stream
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ad_ip_instance axis_dwidth_converter m_axis_samples_24
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ad_ip_parameter m_axis_samples_24 CONFIG.M_TDATA_NUM_BYTES 3
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# upscale the data to 32bit, samples should be multiple of 16bit
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ad_ip_instance util_axis_upscale axis_upscaler
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ad_ip_parameter axis_upscaler CONFIG.NUM_OF_CHANNELS 1
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ad_ip_parameter axis_upscaler CONFIG.DATA_WIDTH 24
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ad_ip_parameter axis_upscaler CONFIG.UDATA_WIDTH 32
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ad_connect axis_upscaler/dfmt_enable GND
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ad_connect axis_upscaler/dfmt_type GND
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ad_connect axis_upscaler/dfmt_se GND
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ad_connect axi_2/spi_engine_offload_ctrl0 offload/spi_engine_offload_ctrl
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ad_connect offload/spi_engine_ctrl interconnect/s0_ctrl
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ad_connect axi_2/spi_engine_ctrl interconnect/s1_ctrl
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ad_connect interconnect/m_ctrl execution/ctrl
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ad_connect offload/offload_sdi m_axis_samples_24/S_AXIS
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ad_connect m_axis_samples_24/M_AXIS M_AXIS_SAMPLE
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ad_connect m_axis_samples_24/M_AXIS axis_upscaler/s_axis
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ad_connect axis_upscaler/m_axis M_AXIS_SAMPLE
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ad_connect execution/spi m_spi
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@ -108,11 +135,13 @@ current_bd_instance /spi_adc2
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ad_connect clk axi_2/spi_clk
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ad_connect clk interconnect/clk
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ad_connect clk m_axis_samples_24/aclk
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ad_connect clk axis_upscaler/clk
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ad_connect axi_2/spi_resetn offload/spi_resetn
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ad_connect axi_2/spi_resetn execution/resetn
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ad_connect axi_2/spi_resetn interconnect/resetn
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ad_connect axi_2/spi_resetn m_axis_samples_24/aresetn
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ad_connect axi_2/spi_resetn axis_upscaler/resetn
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ad_connect drdy offload/trigger
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@ -26,6 +26,7 @@ M_DEPS += ../../../library/spi_engine/axi_spi_engine/axi_spi_engine.xpr
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M_DEPS += ../../../library/spi_engine/spi_engine_execution/spi_engine_execution.xpr
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M_DEPS += ../../../library/spi_engine/spi_engine_interconnect/spi_engine_interconnect.xpr
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M_DEPS += ../../../library/spi_engine/spi_engine_offload/spi_engine_offload.xpr
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M_DEPS += ../../../library/util_axis_upscale/util_axis_upscale.xpr
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M_DEPS += ../../../library/util_i2c_mixer/util_i2c_mixer.xpr
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M_VIVADO := vivado -mode batch -source
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@ -64,6 +65,7 @@ clean-all:clean
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$(MAKE) -C ../../../library/spi_engine/spi_engine_execution clean
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$(MAKE) -C ../../../library/spi_engine/spi_engine_interconnect clean
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$(MAKE) -C ../../../library/spi_engine/spi_engine_offload clean
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$(MAKE) -C ../../../library/util_axis_upscale clean
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$(MAKE) -C ../../../library/util_i2c_mixer clean
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@ -82,6 +84,7 @@ lib:
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$(MAKE) -C ../../../library/spi_engine/spi_engine_execution
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$(MAKE) -C ../../../library/spi_engine/spi_engine_interconnect
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$(MAKE) -C ../../../library/spi_engine/spi_engine_offload
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$(MAKE) -C ../../../library/util_axis_upscale
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$(MAKE) -C ../../../library/util_i2c_mixer
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####################################################################################
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@ -2,12 +2,3 @@
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source $ad_hdl_dir/projects/common/zed/zed_system_bd.tcl
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source ../common/ad77681evb_bd.tcl
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# Disable a CRITICAL WARNING, which appears because of the SPI_ENGINE and DMA data width
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# missmatch.
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# The warning are the following:
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#
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# CRITICAL WARNING: [BD 41-237] Bus Interface property TDATA_NUM_BYTES does not
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# match between /axi_ad77681_dma_1/s_axis(4) and /spi_adc1/m_axis_samples_24/M_AXIS(3)
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# CRITICAL WARNING: [BD 41-237] Bus Interface property TDATA_NUM_BYTES does not
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# match between /axi_ad77681_dma_2/s_axis(4) and /spi_adc2/m_axis_samples_24/M_AXIS(3)
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set_msg_config -severity {CRITICAL WARNING} -quiet -id {BD 41-237} -new_severity info
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