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axi_dmac: request_generator: Remove reset from data path 

The burst_count signal and its derived signals are not used until the
burst_count has been explicitly initialized by loading a transfer. There is
no need to have a reset.

This reduces the fan-out of the reset signal.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
main
Lars-Peter Clausen 2018-06-04 17:56:32 +02:00 committed by Lars-Peter Clausen
parent 6bc1eae48d
commit 8b8df70df1
1 changed files with 8 additions and 3 deletions
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11
library/axi_dmac/request_generator.v
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@ -70,10 +70,17 @@ wire [ID_WIDTH-1:0] id_next = inc_id(id);
assign eot = burst_count == 'h00; assign eot = burst_count == 'h00;
assign request_id = id; assign request_id = id;
always @(posedge req_aclk) begin
if (req_ready == 1'b1) begin
burst_count <= req_burst_count;
end else if (response_id != id_next && pause == 1'b0) begin
burst_count <= burst_count - 1'b1;
end
end
always @(posedge req_aclk) always @(posedge req_aclk)
begin begin
if (req_aresetn == 1'b0) begin if (req_aresetn == 1'b0) begin
burst_count <= 'h00;
id <= 'h0; id <= 'h0;
req_ready <= 1'b1; req_ready <= 1'b1;
end else if (enable == 1'b0) begin end else if (enable == 1'b0) begin
@ -81,13 +88,11 @@ begin
end else begin end else begin
if (req_ready) begin if (req_ready) begin
if (req_valid && enable) begin if (req_valid && enable) begin
burst_count <= req_burst_count;
req_ready <= 1'b0; req_ready <= 1'b0;
end end
end else if (response_id != id_next && ~pause) begin end else if (response_id != id_next && ~pause) begin
if (eot) if (eot)
req_ready <= 1'b1; req_ready <= 1'b1;
burst_count <= burst_count - 1'b1;
id <= id_next; id <= id_next;
end end
end end