jesd204_tpl: update address widths of TPL instances

library/axi_ad6676/axi_ad6676.v

@@ -65,7 +65,7 @@ module axi_ad6676 #(
   input                          s_axi_aclk,
   input                          s_axi_aresetn,
   input                          s_axi_awvalid,
-  input       [15:0]             s_axi_awaddr,
+  input       [11:0]             s_axi_awaddr,
   output                         s_axi_awready,
   input                          s_axi_wvalid,
   input       [31:0]             s_axi_wdata,
@@ -75,7 +75,7 @@ module axi_ad6676 #(
   output      [ 1:0]             s_axi_bresp,
   input                          s_axi_bready,
   input                          s_axi_arvalid,
-  input       [15:0]             s_axi_araddr,
+  input       [11:0]             s_axi_araddr,
   output                         s_axi_arready,
   output                         s_axi_rvalid,
   output      [ 1:0]             s_axi_rresp,

library/axi_ad9144/axi_ad9144.v

@@ -74,7 +74,7 @@ module axi_ad9144 #(
   input                   s_axi_aclk,
   input                   s_axi_aresetn,
   input                   s_axi_awvalid,
-  input       [ 15:0]     s_axi_awaddr,
+  input       [ 11:0]     s_axi_awaddr,
   input       [ 2:0]      s_axi_awprot,
   output                  s_axi_awready,
   input                   s_axi_wvalid,
@@ -85,7 +85,7 @@ module axi_ad9144 #(
   output      [ 1:0]      s_axi_bresp,
   input                   s_axi_bready,
   input                   s_axi_arvalid,
-  input       [ 15:0]     s_axi_araddr,
+  input       [ 11:0]     s_axi_araddr,
   input       [ 2:0]      s_axi_arprot,
   output                  s_axi_arready,
   output                  s_axi_rvalid,

library/axi_ad9144/axi_ad9144_hw.tcl

@@ -62,7 +62,7 @@ set_parameter_property QUAD_OR_DUAL_N HDL_PARAMETER true
 
 # axi4 slave
 
-ad_ip_intf_s_axi s_axi_aclk s_axi_aresetn
+ad_ip_intf_s_axi s_axi_aclk s_axi_aresetn 12
 
 # transceiver interface
 

library/axi_ad9152/axi_ad9152.v

@@ -67,7 +67,7 @@ module axi_ad9152 #(
   input                   s_axi_aclk,
   input                   s_axi_aresetn,
   input                   s_axi_awvalid,
-  input       [ 15:0]     s_axi_awaddr,
+  input       [ 11:0]     s_axi_awaddr,
   input       [ 2:0]      s_axi_awprot,
   output                  s_axi_awready,
   input                   s_axi_wvalid,
@@ -78,7 +78,7 @@ module axi_ad9152 #(
   output      [ 1:0]      s_axi_bresp,
   input                   s_axi_bready,
   input                   s_axi_arvalid,
-  input       [ 15:0]     s_axi_araddr,
+  input       [ 11:0]     s_axi_araddr,
   input       [ 2:0]      s_axi_arprot,
   output                  s_axi_arready,
   output                  s_axi_rvalid,

library/axi_ad9152/axi_ad9152_hw.tcl

@@ -54,7 +54,7 @@ set_parameter_property ID HDL_PARAMETER true
 
 # axi4 slave
 
-ad_ip_intf_s_axi s_axi_aclk s_axi_aresetn
+ad_ip_intf_s_axi s_axi_aclk s_axi_aresetn 12
 
 # transceiver interface
 

library/axi_ad9250/axi_ad9250.v

@@ -64,7 +64,7 @@ module axi_ad9250 #(
   input                   s_axi_aclk,
   input                   s_axi_aresetn,
   input                   s_axi_awvalid,
-  input       [15:0]      s_axi_awaddr,
+  input       [11:0]      s_axi_awaddr,
   input       [ 2:0]      s_axi_awprot,
   output                  s_axi_awready,
   input                   s_axi_wvalid,
@@ -75,7 +75,7 @@ module axi_ad9250 #(
   output      [ 1:0]      s_axi_bresp,
   input                   s_axi_bready,
   input                   s_axi_arvalid,
-  input       [15:0]      s_axi_araddr,
+  input       [11:0]      s_axi_araddr,
   input       [ 2:0]      s_axi_arprot,
   output                  s_axi_arready,
   output                  s_axi_rvalid,

library/axi_ad9680/axi_ad9680.v

@@ -64,7 +64,7 @@ module axi_ad9680 #(
   input                   s_axi_aclk,
   input                   s_axi_aresetn,
   input                   s_axi_awvalid,
-  input       [15:0]      s_axi_awaddr,
+  input       [11:0]      s_axi_awaddr,
   input       [ 2:0]      s_axi_awprot,
   output                  s_axi_awready,
   input                   s_axi_wvalid,
@@ -75,7 +75,7 @@ module axi_ad9680 #(
   output      [ 1:0]      s_axi_bresp,
   input                   s_axi_bready,
   input                   s_axi_arvalid,
-  input       [15:0]      s_axi_araddr,
+  input       [11:0]      s_axi_araddr,
   input       [ 2:0]      s_axi_arprot,
   output                  s_axi_arready,
   output                  s_axi_rvalid,