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ad9081_fmca_ebz: Update parameter description

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Laszlo Nagy 2022-03-03 07:43:17 +00:00 committed by Laszlo Nagy
parent 5ced589258
commit 8df1d8eade
4 changed files with 18 additions and 1 deletions
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12
projects/ad9081_fmca_ebz/a10soc/system_project.tcl
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@ -14,6 +14,18 @@ source ../../scripts/adi_project_intel.tcl
#
# Lane Rate = I/Q Sample Rate x M x N' x (10 \ 8) \ L
# Parameter description:
#
# RX_RATE : Lane rate of the Rx link ( MxFE to FPGA )
# TX_RATE : Lane rate of the Tx link ( FPGA to MxFE )
# [RX/TX]_JESD_M : Number of converters per link
# [RX/TX]_JESD_L : Number of lanes per link
# [RX/TX]_JESD_S : Number of samples per frame
# [RX/TX]_JESD_NP : Number of bits per sample
# [RX/TX]_NUM_LINKS : Number of links
# [RX/TX]_KS_PER_CHANNEL : Number of samples stored in internal buffers in kilosamples per converter (M)
#
adi_project ad9081_fmca_ebz_a10soc [list \
RX_LANE_RATE [get_env_param RX_RATE 10 ] \
TX_LANE_RATE [get_env_param TX_RATE 10 ] \

3
projects/ad9081_fmca_ebz/vck190/system_project.tcl
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@ -22,9 +22,10 @@ source $ad_hdl_dir/projects/scripts/adi_board.tcl
# TX_RATE : Line rate of the Tx link ( FPGA to MxFE )
# [RX/TX]_JESD_M : Number of converters per link
# [RX/TX]_JESD_L : Number of lanes per link
# [RX/TX]_JESD_S : Number of samples per frame
# [RX/TX]_JESD_NP : Number of bits per sample, only 16 is supported
# [RX/TX]_NUM_LINKS : Number of links, matches numer of MxFE devices
#
# [RX/TX]_KS_PER_CHANNEL : Number of samples stored in internal buffers in kilosamples per converter (M)
#
# make JESD_MODE=64B66B RX_RATE=24.75 TX_RATE=24.75 RX_JESD_M=4 RX_JESD_L=4 RX_JESD_S=2 RX_JESD_NP=12 TX_JESD_M=4 TX_JESD_L=4 TX_JESD_S=2 TX_JESD_NP=12

2
projects/ad9081_fmca_ebz/vcu118/system_project.tcl
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@ -26,8 +26,10 @@ source $ad_hdl_dir/projects/scripts/adi_board.tcl
# TX_RATE : Lane rate of the Tx link ( FPGA to MxFE )
# [RX/TX]_JESD_M : Number of converters per link
# [RX/TX]_JESD_L : Number of lanes per link
# [RX/TX]_JESD_S : Number of samples per frame
# [RX/TX]_JESD_NP : Number of bits per sample
# [RX/TX]_NUM_LINKS : Number of links
# [RX/TX]_KS_PER_CHANNEL : Number of samples stored in internal buffers in kilosamples per converter (M)
#
adi_project ad9081_fmca_ebz_vcu118 0 [list \

2
projects/ad9081_fmca_ebz/vcu128/system_project.tcl
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@ -26,8 +26,10 @@ source $ad_hdl_dir/projects/scripts/adi_board.tcl
# TX_RATE : Lane rate of the Tx link ( FPGA to MxFE )
# [RX/TX]_JESD_M : Number of converters per link
# [RX/TX]_JESD_L : Number of lanes per link
# [RX/TX]_JESD_S : Number of samples per frame
# [RX/TX]_JESD_NP : Number of bits per sample
# [RX/TX]_NUM_LINKS : Number of links
# [RX/TX]_KS_PER_CHANNEL : Number of samples stored in internal buffers in kilosamples per converter (M)
#
adi_project ad9081_fmca_ebz_vcu128 0 [list \