ad9625x2_fmc: dma fifo additions
Rejeesh Kutty
parent
7ad9340992
commit
8e6cb2bad4
|
|
@ -21,6 +21,10 @@ set rx_sync_1 [create_bd_port -dir O rx_sync_1]
|
|||
|
||||
set rx_sysref [create_bd_port -dir O rx_sysref]
|
||||
|
||||
set ad9625_spi_intr [create_bd_port -dir O ad9625_spi_intr]
|
||||
set ad9625_gpio_intr [create_bd_port -dir O ad9625_gpio_intr]
|
||||
set ad9625_dma_intr [create_bd_port -dir O ad9625_dma_intr]
|
||||
|
||||
set gpio_ad9625_i [create_bd_port -dir I -from 18 -to 0 gpio_ad9625_i]
|
||||
set gpio_ad9625_o [create_bd_port -dir O -from 18 -to 0 gpio_ad9625_o]
|
||||
set gpio_ad9625_t [create_bd_port -dir O -from 18 -to 0 gpio_ad9625_t]
|
||||
|
|
@ -32,9 +36,8 @@ set adc_data_0 [create_bd_port -dir O -from 255 -to 0 adc_data_0]
|
|||
set adc_valid_1 [create_bd_port -dir O adc_valid_1]
|
||||
set adc_enable_1 [create_bd_port -dir O adc_enable_1]
|
||||
set adc_data_1 [create_bd_port -dir O -from 255 -to 0 adc_data_1]
|
||||
set dma_wr [create_bd_port -dir I dma_wr]
|
||||
set dma_sync [create_bd_port -dir I dma_sync]
|
||||
set dma_data [create_bd_port -dir I -from 511 -to 0 dma_data]
|
||||
set adc_wr [create_bd_port -dir I adc_wr]
|
||||
set adc_wdata [create_bd_port -dir I -from 511 -to 0 adc_wdata]
|
||||
|
||||
# adc peripherals
|
||||
|
||||
|
|
@ -73,18 +76,18 @@ set_property -dict [list CONFIG.PCORE_PMA_RSV {0x00018480}] $axi_ad9625_1_gt
|
|||
set_property -dict [list CONFIG.PCORE_RX_CDR_CFG {0x03000023ff20400020}] $axi_ad9625_1_gt
|
||||
|
||||
set axi_ad9625_dma [create_bd_cell -type ip -vlnv analog.com:user:axi_dmac:1.0 axi_ad9625_dma]
|
||||
set_property -dict [list CONFIG.C_DMA_TYPE_SRC {2}] $axi_ad9625_dma
|
||||
set_property -dict [list CONFIG.C_DMA_TYPE_SRC {1}] $axi_ad9625_dma
|
||||
set_property -dict [list CONFIG.C_DMA_TYPE_DEST {0}] $axi_ad9625_dma
|
||||
set_property -dict [list CONFIG.PCORE_ID {0}] $axi_ad9625_dma
|
||||
set_property -dict [list CONFIG.C_AXI_SLICE_SRC {0}] $axi_ad9625_dma
|
||||
set_property -dict [list CONFIG.C_AXI_SLICE_DEST {0}] $axi_ad9625_dma
|
||||
set_property -dict [list CONFIG.C_CLKS_ASYNC_DEST_REQ {1}] $axi_ad9625_dma
|
||||
set_property -dict [list CONFIG.C_SYNC_TRANSFER_START {1}] $axi_ad9625_dma
|
||||
set_property -dict [list CONFIG.C_SYNC_TRANSFER_START {0}] $axi_ad9625_dma
|
||||
set_property -dict [list CONFIG.C_DMA_LENGTH_WIDTH {24}] $axi_ad9625_dma
|
||||
set_property -dict [list CONFIG.C_2D_TRANSFER {0}] $axi_ad9625_dma
|
||||
set_property -dict [list CONFIG.C_CYCLIC {0}] $axi_ad9625_dma
|
||||
set_property -dict [list CONFIG.C_DMA_DATA_WIDTH_SRC {512}] $axi_ad9625_dma
|
||||
set_property -dict [list CONFIG.C_DMA_DATA_WIDTH_DEST {512}] $axi_ad9625_dma
|
||||
set_property -dict [list CONFIG.C_DMA_DATA_WIDTH_SRC {64}] $axi_ad9625_dma
|
||||
set_property -dict [list CONFIG.C_DMA_DATA_WIDTH_DEST {64}] $axi_ad9625_dma
|
||||
|
||||
set axi_ad9625_gpio [create_bd_cell -type ip -vlnv xilinx.com:ip:axi_gpio:2.0 axi_ad9625_gpio]
|
||||
set_property -dict [list CONFIG.C_IS_DUAL {0}] $axi_ad9625_gpio
|
||||
|
|
@ -96,15 +99,13 @@ set_property -dict [list CONFIG.C_USE_STARTUP {0}] $axi_ad9625_spi
|
|||
set_property -dict [list CONFIG.C_NUM_SS_BITS {2}] $axi_ad9625_spi
|
||||
set_property -dict [list CONFIG.C_SCK_RATIO {8}] $axi_ad9625_spi
|
||||
|
||||
p_sys_dmafifo [current_bd_instance .] axi_ad9625_fifo 512
|
||||
|
||||
# additions to default configuration
|
||||
|
||||
set_property -dict [list CONFIG.NUM_MI {16}] $axi_cpu_interconnect
|
||||
set_property -dict [list CONFIG.NUM_SI {11}] $axi_mem_interconnect
|
||||
|
||||
delete_bd_objs [get_bd_nets sys_concat_intc_din_2]
|
||||
delete_bd_objs [get_bd_ports unc_int2]
|
||||
|
||||
# connections (spi and gpio)
|
||||
|
||||
connect_bd_net -net spi_csn_i [get_bd_ports spi_csn_i] [get_bd_pins axi_ad9625_spi/ss_i]
|
||||
|
|
@ -119,8 +120,8 @@ connect_bd_net -net gpio_ad9625_i [get_bd_ports gpio_ad9625_i] [get_bd_pins
|
|||
connect_bd_net -net gpio_ad9625_o [get_bd_ports gpio_ad9625_o] [get_bd_pins axi_ad9625_gpio/gpio_io_o]
|
||||
connect_bd_net -net gpio_ad9625_t [get_bd_ports gpio_ad9625_t] [get_bd_pins axi_ad9625_gpio/gpio_io_t]
|
||||
|
||||
connect_bd_net -net axi_ad9625_spi_irq [get_bd_pins axi_ad9625_spi/ip2intc_irpt] [get_bd_pins sys_concat_intc/In10]
|
||||
connect_bd_net -net axi_ad9625_gpio_irq [get_bd_pins axi_ad9625_gpio/ip2intc_irpt] [get_bd_pins sys_concat_intc/In9]
|
||||
connect_bd_net -net axi_ad9625_spi_irq [get_bd_pins axi_ad9625_spi/ip2intc_irpt] [get_bd_ports ad9625_spi_intr]
|
||||
connect_bd_net -net axi_ad9625_gpio_irq [get_bd_pins axi_ad9625_gpio/ip2intc_irpt] [get_bd_ports ad9625_gpio_intr]
|
||||
|
||||
# connections (gt)
|
||||
|
||||
|
|
@ -140,6 +141,8 @@ connect_bd_net -net axi_ad9625_1_gt_rx_sync [get_bd_pins axi_ad9625_1_
|
|||
connect_bd_net -net axi_ad9625_0_gt_rx_rst [get_bd_pins axi_ad9625_0_gt/rx_rst]
|
||||
connect_bd_net -net axi_ad9625_0_gt_rx_rst [get_bd_pins axi_ad9625_0_jesd/rx_reset]
|
||||
connect_bd_net -net axi_ad9625_0_gt_rx_rst [get_bd_pins axi_ad9625_1_jesd/rx_reset]
|
||||
connect_bd_net -net axi_ad9625_0_gt_rx_rst [get_bd_pins axi_ad9625_fifo/adc_rst] [get_bd_pins axi_ad9625_0_gt/rx_rst]
|
||||
connect_bd_net -net sys_100m_resetn [get_bd_pins axi_ad9625_fifo/dma_rstn] $sys_100m_resetn_source
|
||||
|
||||
connect_bd_net -net axi_ad9625_0_gt_rx_clk [get_bd_pins axi_ad9625_0_gt/rx_clk_g]
|
||||
connect_bd_net -net axi_ad9625_0_gt_rx_clk [get_bd_pins axi_ad9625_0_gt/rx_clk]
|
||||
|
|
@ -148,7 +151,7 @@ connect_bd_net -net axi_ad9625_0_gt_rx_clk [get_bd_pins axi_ad9625_0_
|
|||
connect_bd_net -net axi_ad9625_0_gt_rx_clk [get_bd_pins axi_ad9625_1_gt/rx_clk]
|
||||
connect_bd_net -net axi_ad9625_0_gt_rx_clk [get_bd_pins axi_ad9625_1_core/rx_clk]
|
||||
connect_bd_net -net axi_ad9625_0_gt_rx_clk [get_bd_pins axi_ad9625_1_jesd/rx_core_clk]
|
||||
connect_bd_net -net axi_ad9625_0_gt_rx_clk [get_bd_pins axi_ad9625_dma/fifo_wr_clk]
|
||||
connect_bd_net -net axi_ad9625_0_gt_rx_clk [get_bd_pins axi_ad9625_fifo/adc_clk] [get_bd_pins axi_ad9625_0_gt/rx_clk_g]
|
||||
connect_bd_net -net axi_ad9625_0_gt_rx_clk [get_bd_ports adc_clk]
|
||||
|
||||
connect_bd_net -net axi_ad9625_0_gt_rx_sysref [get_bd_pins axi_ad9625_0_jesd/rx_sysref]
|
||||
|
|
@ -186,13 +189,17 @@ connect_bd_net -net axi_ad9625_0_core_adc_data [get_bd_pins axi_ad9625_0_
|
|||
connect_bd_net -net axi_ad9625_1_core_adc_valid [get_bd_pins axi_ad9625_1_core/adc_valid] [get_bd_ports adc_valid_1]
|
||||
connect_bd_net -net axi_ad9625_1_core_adc_enable [get_bd_pins axi_ad9625_1_core/adc_enable] [get_bd_ports adc_enable_1]
|
||||
connect_bd_net -net axi_ad9625_1_core_adc_data [get_bd_pins axi_ad9625_1_core/adc_data] [get_bd_ports adc_data_1]
|
||||
connect_bd_net -net axi_ad9625_adc_wr [get_bd_ports adc_wr] [get_bd_pins axi_ad9625_fifo/adc_wr]
|
||||
connect_bd_net -net axi_ad9625_adc_wdata [get_bd_ports adc_wdata] [get_bd_pins axi_ad9625_fifo/adc_wdata]
|
||||
connect_bd_net -net axi_ad9625_adc_wovf [get_bd_pins axi_ad9625_0_core/adc_dovf] [get_bd_pins axi_ad9625_fifo/adc_wovf]
|
||||
connect_bd_net -net sys_100m_clk [get_bd_pins axi_ad9625_fifo/dma_clk] [get_bd_pins axi_ad9625_dma/s_axis_aclk]
|
||||
connect_bd_net -net axi_ad9625_dma_dvalid [get_bd_pins axi_ad9625_fifo/dma_wvalid] [get_bd_pins axi_ad9625_dma/s_axis_valid]
|
||||
connect_bd_net -net axi_ad9625_dma_dready [get_bd_pins axi_ad9625_fifo/dma_wready] [get_bd_pins axi_ad9625_dma/s_axis_ready]
|
||||
connect_bd_net -net axi_ad9625_dma_ddata [get_bd_pins axi_ad9625_fifo/dma_wdata] [get_bd_pins axi_ad9625_dma/s_axis_data]
|
||||
connect_bd_net -net axi_ad9625_dma_xfer_req [get_bd_pins axi_ad9625_fifo/axi_xfer_req] [get_bd_pins axi_ad9625_dma/s_axis_xfer_req]
|
||||
connect_bd_net -net axi_ad9625_dma_intr [get_bd_pins axi_ad9625_dma/irq] [get_bd_ports ad9625_dma_intr]
|
||||
|
||||
connect_bd_net -net axi_ad9625_dma_adc_dwr [get_bd_pins axi_ad9625_dma/fifo_wr_en] [get_bd_ports dma_wr]
|
||||
connect_bd_net -net axi_ad9625_dma_adc_dsync [get_bd_pins axi_ad9625_dma/fifo_wr_sync] [get_bd_ports dma_sync]
|
||||
connect_bd_net -net axi_ad9625_dma_adc_ddata [get_bd_pins axi_ad9625_dma/fifo_wr_din] [get_bd_ports dma_data]
|
||||
|
||||
connect_bd_net -net axi_ad9625_dma_adc_dovf [get_bd_pins axi_ad9625_0_core/adc_dovf] [get_bd_pins axi_ad9625_dma/fifo_wr_overflow]
|
||||
connect_bd_net -net axi_ad9625_dma_irq [get_bd_pins axi_ad9625_dma/irq] [get_bd_pins sys_concat_intc/In13]
|
||||
connect_bd_net -net sys_200m_clk [get_bd_pins axi_ad9625_fifo/axi_clk] $sys_200m_clk_source
|
||||
|
||||
# interconnect (cpu)
|
||||
|
||||
|
|
|
|||
Loading…
Reference in New Issue