fmcjesdadc1- a5soc tcl updates
Rejeesh Kutty
parent
4e99c3be9a
commit
8ea9beffaf
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@ -2,8 +2,8 @@
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package require qsys
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set_module_property NAME {system_bd}
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set_project_property DEVICE_FAMILY {Arria 10}
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set_project_property DEVICE {10AX115S3F45E2SGE3}
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set_project_property DEVICE_FAMILY {Arria V}
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set_project_property DEVICE {5ASTFD5K3F40I3ES}
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set system_type nios
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@ -1,313 +0,0 @@
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<?xml version="1.0" encoding="UTF-8"?>
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<system name="$${FILENAME}">
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<component
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name="$${FILENAME}"
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displayName="$${FILENAME}"
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version="1.0"
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description=""
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tags=""
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categories="System" />
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<parameter name="bonusData"><![CDATA[bonusData
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{
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element $${FILENAME}
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{
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datum _originalDeviceFamily
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{
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value = "Arria V";
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type = "String";
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}
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}
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element a5soc_base
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{
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datum _sortIndex
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{
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value = "0";
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type = "int";
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}
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}
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element a5soc_base.sys_hps_s_axi
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{
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datum baseAddress
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{
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value = "0";
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type = "String";
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}
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}
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element fmcjesdadc1
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{
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datum _sortIndex
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{
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value = "1";
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type = "int";
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}
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}
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element fmcjesdadc1.axi_ad9250_0_s_axi
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{
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datum baseAddress
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{
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value = "131072";
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type = "String";
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}
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}
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element fmcjesdadc1.axi_ad9250_1_s_axi
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{
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datum baseAddress
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{
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value = "65536";
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type = "String";
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}
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}
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element fmcjesdadc1.axi_dmac_0_s_axi
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{
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datum baseAddress
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{
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value = "212992";
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type = "String";
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}
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}
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element fmcjesdadc1.axi_dmac_1_s_axi
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{
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datum baseAddress
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{
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value = "196608";
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type = "String";
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}
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}
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element fmcjesdadc1.axi_jesd_xcvr_s_axi
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{
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datum baseAddress
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{
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value = "0";
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type = "String";
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}
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}
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element system_bd
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{
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datum _originalDeviceFamily
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{
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value = "Arria V";
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type = "String";
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}
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}
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}
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]]></parameter>
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<parameter name="clockCrossingAdapter" value="FIFO" />
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<parameter name="device" value="5ASTFD5K3F40I3ES" />
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<parameter name="deviceFamily" value="Arria V" />
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<parameter name="deviceSpeedGrade" value="3_H3" />
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<parameter name="fabricMode" value="QSYS" />
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<parameter name="generateLegacySim" value="false" />
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<parameter name="generationId" value="0" />
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<parameter name="globalResetBus" value="false" />
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<parameter name="hdlLanguage" value="VERILOG" />
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<parameter name="hideFromIPCatalog" value="false" />
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<parameter name="lockedInterfaceDefinition" value="" />
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<parameter name="maxAdditionalLatency" value="2" />
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<parameter name="projectName">fmcjesdadc1_a5soc.qpf</parameter>
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<parameter name="sopcBorderPoints" value="false" />
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<parameter name="systemHash" value="0" />
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<parameter name="testBenchDutName" value="" />
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<parameter name="timeStamp" value="0" />
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<parameter name="useTestBenchNamingPattern" value="false" />
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<instanceScript></instanceScript>
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<interface
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name="a5soc_base_sys_gpio_bd_external_connection"
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internal="a5soc_base.sys_gpio_bd_external_connection"
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type="conduit"
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dir="end" />
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<interface
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name="a5soc_base_sys_gpio_external_connection"
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internal="a5soc_base.sys_gpio_external_connection"
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type="conduit"
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dir="end" />
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<interface
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name="a5soc_base_sys_hps_i2c0"
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internal="a5soc_base.sys_hps_i2c0"
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type="conduit"
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dir="end" />
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<interface
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name="a5soc_base_sys_hps_i2c0_clk"
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internal="a5soc_base.sys_hps_i2c0_clk"
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type="clock"
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dir="start" />
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<interface
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name="a5soc_base_sys_hps_i2c0_scl_in"
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internal="a5soc_base.sys_hps_i2c0_scl_in"
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type="clock"
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dir="end" />
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<interface
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name="a5soc_base_sys_hps_io"
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internal="a5soc_base.sys_hps_io"
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type="conduit"
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dir="end" />
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<interface
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name="a5soc_base_sys_hps_memory"
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internal="a5soc_base.sys_hps_memory"
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type="conduit"
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dir="end" />
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<interface
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name="a5soc_base_sys_hps_spim0"
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internal="a5soc_base.sys_hps_spim0"
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type="conduit"
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dir="end" />
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<interface
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name="a5soc_base_sys_hps_spim0_sclk_out"
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internal="a5soc_base.sys_hps_spim0_sclk_out"
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type="clock"
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dir="start" />
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<interface
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name="fmcjesdadc1_rx_data"
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internal="fmcjesdadc1.rx_data"
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type="conduit"
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dir="end" />
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<interface
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name="fmcjesdadc1_rx_ref_clk"
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internal="fmcjesdadc1.rx_ref_clk"
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type="clock"
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dir="end" />
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<interface
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name="fmcjesdadc1_rx_sync"
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internal="fmcjesdadc1.rx_sync"
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type="conduit"
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dir="end" />
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<interface
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name="fmcjesdadc1_rx_sysref"
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internal="fmcjesdadc1.rx_sysref"
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type="conduit"
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dir="end" />
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<module name="a5soc_base" kind="a5soc_system_bd" version="1.0" enabled="1">
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<parameter name="AUTO_DEVICE" value="5ASTFD5K3F40I3ES" />
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<parameter name="AUTO_DEVICE_FAMILY" value="Arria V" />
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<parameter name="AUTO_DEVICE_SPEEDGRADE" value="3_H3" />
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<parameter name="AUTO_GENERATION_ID" value="0" />
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<parameter name="AUTO_SYS_CPU_INTERCONNECT_M0_ADDRESS_MAP"><![CDATA[<address-map><slave name='fmcjesdadc1_axi_jesd_xcvr.s_axi' start='0x0' end='0x10000' /><slave name='fmcjesdadc1_axi_ad9250_1.s_axi' start='0x10000' end='0x20000' /><slave name='fmcjesdadc1_axi_ad9250_0.s_axi' start='0x20000' end='0x30000' /><slave name='fmcjesdadc1_axi_dmac_1.s_axi' start='0x30000' end='0x34000' /><slave name='fmcjesdadc1_axi_dmac_0.s_axi' start='0x34000' end='0x38000' /></address-map>]]></parameter>
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<parameter
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name="AUTO_SYS_CPU_INTERCONNECT_M0_ADDRESS_WIDTH"
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value="AddressWidth = 18" />
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<parameter name="AUTO_SYS_HPS_I2C0_SCL_IN_CLOCK_DOMAIN" value="2" />
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<parameter name="AUTO_SYS_HPS_I2C0_SCL_IN_CLOCK_RATE" value="0" />
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<parameter name="AUTO_SYS_HPS_I2C0_SCL_IN_RESET_DOMAIN" value="2" />
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<parameter name="AUTO_SYS_INTR_INTERRUPTS_USED" value="3" />
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<parameter name="AUTO_UNIQUE_ID">$${FILENAME}_a5soc_base</parameter>
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</module>
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<module name="fmcjesdadc1" kind="fmcjesdadc1_bd" version="1.0" enabled="1">
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<parameter name="AUTO_AXI_DMAC_0_M_AXI_ADDRESS_MAP"><![CDATA[<address-map><slave name='a5soc_base_sys_hps_axi_sdram.axi_slave0' start='0x0' end='0x80000000' /><slave name='a5soc_base_sys_hps_gmac0.axi_slave0' start='0xFF700000' end='0xFF702000' /><slave name='a5soc_base_sys_hps_gmac1.axi_slave0' start='0xFF702000' end='0xFF704000' /><slave name='a5soc_base_sys_hps_sdmmc.axi_slave0' start='0xFF704000' end='0xFF705000' /><slave name='a5soc_base_sys_hps_qspi.axi_slave0' start='0xFF705000' end='0xFF705100' /><slave name='a5soc_base_sys_hps_fpgamgr.axi_slave0' start='0xFF706000' end='0xFF707000' /><slave name='a5soc_base_sys_hps_gpio0.axi_slave0' start='0xFF708000' end='0xFF708100' /><slave name='a5soc_base_sys_hps_gpio1.axi_slave0' start='0xFF709000' end='0xFF709100' /><slave name='a5soc_base_sys_hps_gpio2.axi_slave0' start='0xFF70A000' end='0xFF70A100' /><slave name='a5soc_base_sys_hps_l3regs.axi_slave0' start='0xFF800000' end='0xFF801000' /><slave name='a5soc_base_sys_hps_nand0.axi_slave0' start='0xFF900000' end='0xFF910000' /><slave name='a5soc_base_sys_hps_qspi.axi_slave1' start='0xFFA00000' end='0xFFA00100' /><slave name='a5soc_base_sys_hps_usb0.axi_slave0' start='0xFFB00000' end='0xFFB40000' /><slave name='a5soc_base_sys_hps_usb1.axi_slave0' start='0xFFB40000' end='0xFFB80000' /><slave name='a5soc_base_sys_hps_nand0.axi_slave1' start='0xFFB80000' end='0xFFB90000' /><slave name='a5soc_base_sys_hps_fpgamgr.axi_slave1' start='0xFFB90000' end='0xFFB90100' /><slave name='a5soc_base_sys_hps_dcan0.axi_slave0' start='0xFFC00000' end='0xFFC01000' /><slave name='a5soc_base_sys_hps_dcan1.axi_slave0' start='0xFFC01000' end='0xFFC02000' /><slave name='a5soc_base_sys_hps_uart0.axi_slave0' start='0xFFC02000' end='0xFFC02100' /><slave name='a5soc_base_sys_hps_uart1.axi_slave0' start='0xFFC03000' end='0xFFC03100' /><slave name='a5soc_base_sys_hps_i2c0.axi_slave0' start='0xFFC04000' end='0xFFC04100' /><slave name='a5soc_base_sys_hps_i2c1.axi_slave0' start='0xFFC05000' end='0xFFC05100' /><slave name='a5soc_base_sys_hps_i2c2.axi_slave0' start='0xFFC06000' end='0xFFC06100' /><slave name='a5soc_base_sys_hps_i2c3.axi_slave0' start='0xFFC07000' end='0xFFC07100' /><slave name='a5soc_base_sys_hps_timer0.axi_slave0' start='0xFFC08000' end='0xFFC08100' /><slave name='a5soc_base_sys_hps_timer1.axi_slave0' start='0xFFC09000' end='0xFFC09100' /><slave name='a5soc_base_sys_hps_sdrctl.axi_slave0' start='0xFFC25000' end='0xFFC26000' /><slave name='a5soc_base_sys_hps_timer2.axi_slave0' start='0xFFD00000' end='0xFFD00100' /><slave name='a5soc_base_sys_hps_timer3.axi_slave0' start='0xFFD01000' end='0xFFD01100' /><slave name='a5soc_base_sys_hps_clkmgr.axi_slave0' start='0xFFD04000' end='0xFFD05000' /><slave name='a5soc_base_sys_hps_rstmgr.axi_slave0' start='0xFFD05000' end='0xFFD05100' /><slave name='a5soc_base_sys_hps_sysmgr.axi_slave0' start='0xFFD08000' end='0xFFD08400' /><slave name='a5soc_base_sys_hps_dma.axi_slave0' start='0xFFE01000' end='0xFFE02000' /><slave name='a5soc_base_sys_hps_spim0.axi_slave0' start='0xFFF00000' end='0xFFF00100' /><slave name='a5soc_base_sys_hps_spim1.axi_slave0' start='0xFFF01000' end='0xFFF01100' /><slave name='a5soc_base_sys_hps_arm_gic_0.axi_slave1' start='0xFFFEC100' end='0xFFFEC200' /><slave name='a5soc_base_sys_hps_timer.axi_slave0' start='0xFFFEC600' end='0xFFFEC700' /><slave name='a5soc_base_sys_hps_arm_gic_0.axi_slave0' start='0xFFFED000' end='0xFFFEE000' /><slave name='a5soc_base_sys_hps_L2.axi_slave0' start='0xFFFEF000' end='0xFFFF0000' /><slave name='a5soc_base_sys_hps_axi_ocram.axi_slave0' start='0xFFFF0000' end='0x100000000' /></address-map>]]></parameter>
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<parameter name="AUTO_AXI_DMAC_0_M_AXI_ADDRESS_WIDTH" value="AddressWidth = 32" />
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<parameter name="AUTO_AXI_DMAC_1_M_AXI_ADDRESS_MAP"><![CDATA[<address-map><slave name='a5soc_base_sys_hps_axi_sdram.axi_slave0' start='0x0' end='0x80000000' /><slave name='a5soc_base_sys_hps_gmac0.axi_slave0' start='0xFF700000' end='0xFF702000' /><slave name='a5soc_base_sys_hps_gmac1.axi_slave0' start='0xFF702000' end='0xFF704000' /><slave name='a5soc_base_sys_hps_sdmmc.axi_slave0' start='0xFF704000' end='0xFF705000' /><slave name='a5soc_base_sys_hps_qspi.axi_slave0' start='0xFF705000' end='0xFF705100' /><slave name='a5soc_base_sys_hps_fpgamgr.axi_slave0' start='0xFF706000' end='0xFF707000' /><slave name='a5soc_base_sys_hps_gpio0.axi_slave0' start='0xFF708000' end='0xFF708100' /><slave name='a5soc_base_sys_hps_gpio1.axi_slave0' start='0xFF709000' end='0xFF709100' /><slave name='a5soc_base_sys_hps_gpio2.axi_slave0' start='0xFF70A000' end='0xFF70A100' /><slave name='a5soc_base_sys_hps_l3regs.axi_slave0' start='0xFF800000' end='0xFF801000' /><slave name='a5soc_base_sys_hps_nand0.axi_slave0' start='0xFF900000' end='0xFF910000' /><slave name='a5soc_base_sys_hps_qspi.axi_slave1' start='0xFFA00000' end='0xFFA00100' /><slave name='a5soc_base_sys_hps_usb0.axi_slave0' start='0xFFB00000' end='0xFFB40000' /><slave name='a5soc_base_sys_hps_usb1.axi_slave0' start='0xFFB40000' end='0xFFB80000' /><slave name='a5soc_base_sys_hps_nand0.axi_slave1' start='0xFFB80000' end='0xFFB90000' /><slave name='a5soc_base_sys_hps_fpgamgr.axi_slave1' start='0xFFB90000' end='0xFFB90100' /><slave name='a5soc_base_sys_hps_dcan0.axi_slave0' start='0xFFC00000' end='0xFFC01000' /><slave name='a5soc_base_sys_hps_dcan1.axi_slave0' start='0xFFC01000' end='0xFFC02000' /><slave name='a5soc_base_sys_hps_uart0.axi_slave0' start='0xFFC02000' end='0xFFC02100' /><slave name='a5soc_base_sys_hps_uart1.axi_slave0' start='0xFFC03000' end='0xFFC03100' /><slave name='a5soc_base_sys_hps_i2c0.axi_slave0' start='0xFFC04000' end='0xFFC04100' /><slave name='a5soc_base_sys_hps_i2c1.axi_slave0' start='0xFFC05000' end='0xFFC05100' /><slave name='a5soc_base_sys_hps_i2c2.axi_slave0' start='0xFFC06000' end='0xFFC06100' /><slave name='a5soc_base_sys_hps_i2c3.axi_slave0' start='0xFFC07000' end='0xFFC07100' /><slave name='a5soc_base_sys_hps_timer0.axi_slave0' start='0xFFC08000' end='0xFFC08100' /><slave name='a5soc_base_sys_hps_timer1.axi_slave0' start='0xFFC09000' end='0xFFC09100' /><slave name='a5soc_base_sys_hps_sdrctl.axi_slave0' start='0xFFC25000' end='0xFFC26000' /><slave name='a5soc_base_sys_hps_timer2.axi_slave0' start='0xFFD00000' end='0xFFD00100' /><slave name='a5soc_base_sys_hps_timer3.axi_slave0' start='0xFFD01000' end='0xFFD01100' /><slave name='a5soc_base_sys_hps_clkmgr.axi_slave0' start='0xFFD04000' end='0xFFD05000' /><slave name='a5soc_base_sys_hps_rstmgr.axi_slave0' start='0xFFD05000' end='0xFFD05100' /><slave name='a5soc_base_sys_hps_sysmgr.axi_slave0' start='0xFFD08000' end='0xFFD08400' /><slave name='a5soc_base_sys_hps_dma.axi_slave0' start='0xFFE01000' end='0xFFE02000' /><slave name='a5soc_base_sys_hps_spim0.axi_slave0' start='0xFFF00000' end='0xFFF00100' /><slave name='a5soc_base_sys_hps_spim1.axi_slave0' start='0xFFF01000' end='0xFFF01100' /><slave name='a5soc_base_sys_hps_arm_gic_0.axi_slave1' start='0xFFFEC100' end='0xFFFEC200' /><slave name='a5soc_base_sys_hps_timer.axi_slave0' start='0xFFFEC600' end='0xFFFEC700' /><slave name='a5soc_base_sys_hps_arm_gic_0.axi_slave0' start='0xFFFED000' end='0xFFFEE000' /><slave name='a5soc_base_sys_hps_L2.axi_slave0' start='0xFFFEF000' end='0xFFFF0000' /><slave name='a5soc_base_sys_hps_axi_ocram.axi_slave0' start='0xFFFF0000' end='0x100000000' /></address-map>]]></parameter>
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<parameter name="AUTO_AXI_DMAC_1_M_AXI_ADDRESS_WIDTH" value="AddressWidth = 32" />
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<parameter name="AUTO_DEVICE" value="5ASTFD5K3F40I3ES" />
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<parameter name="AUTO_DEVICE_FAMILY" value="Arria V" />
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<parameter name="AUTO_DEVICE_SPEEDGRADE" value="3_H3" />
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<parameter name="AUTO_GENERATION_ID" value="0" />
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<parameter name="AUTO_MEM_CLK_CLOCK_DOMAIN" value="5" />
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<parameter name="AUTO_MEM_CLK_CLOCK_RATE" value="50000000" />
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<parameter name="AUTO_MEM_CLK_RESET_DOMAIN" value="5" />
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<parameter name="AUTO_RX_REF_CLK_CLOCK_DOMAIN" value="4" />
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<parameter name="AUTO_RX_REF_CLK_CLOCK_RATE" value="0" />
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<parameter name="AUTO_RX_REF_CLK_RESET_DOMAIN" value="4" />
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<parameter name="AUTO_SYS_CLK_CLOCK_DOMAIN" value="5" />
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<parameter name="AUTO_SYS_CLK_CLOCK_RATE" value="50000000" />
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<parameter name="AUTO_SYS_CLK_RESET_DOMAIN" value="5" />
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<parameter name="AUTO_UNIQUE_ID">$${FILENAME}_fmcjesdadc1</parameter>
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</module>
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<connection
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kind="avalon"
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version="15.0"
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start="fmcjesdadc1.axi_dmac_0_m_axi"
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end="a5soc_base.sys_hps_s_axi">
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<parameter name="arbitrationPriority" value="1" />
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<parameter name="baseAddress" value="0x0000" />
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<parameter name="defaultConnection" value="false" />
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</connection>
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<connection
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kind="avalon"
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version="15.0"
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start="fmcjesdadc1.axi_dmac_1_m_axi"
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end="a5soc_base.sys_hps_s_axi">
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<parameter name="arbitrationPriority" value="1" />
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<parameter name="baseAddress" value="0x0000" />
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<parameter name="defaultConnection" value="false" />
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</connection>
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<connection
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kind="avalon"
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version="15.0"
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start="a5soc_base.sys_cpu_interconnect_m0"
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end="fmcjesdadc1.axi_ad9250_0_s_axi">
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<parameter name="arbitrationPriority" value="1" />
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||||
<parameter name="baseAddress" value="0x00020000" />
|
||||
<parameter name="defaultConnection" value="false" />
|
||||
</connection>
|
||||
<connection
|
||||
kind="avalon"
|
||||
version="15.0"
|
||||
start="a5soc_base.sys_cpu_interconnect_m0"
|
||||
end="fmcjesdadc1.axi_ad9250_1_s_axi">
|
||||
<parameter name="arbitrationPriority" value="1" />
|
||||
<parameter name="baseAddress" value="0x00010000" />
|
||||
<parameter name="defaultConnection" value="false" />
|
||||
</connection>
|
||||
<connection
|
||||
kind="avalon"
|
||||
version="15.0"
|
||||
start="a5soc_base.sys_cpu_interconnect_m0"
|
||||
end="fmcjesdadc1.axi_dmac_0_s_axi">
|
||||
<parameter name="arbitrationPriority" value="1" />
|
||||
<parameter name="baseAddress" value="0x00034000" />
|
||||
<parameter name="defaultConnection" value="false" />
|
||||
</connection>
|
||||
<connection
|
||||
kind="avalon"
|
||||
version="15.0"
|
||||
start="a5soc_base.sys_cpu_interconnect_m0"
|
||||
end="fmcjesdadc1.axi_dmac_1_s_axi">
|
||||
<parameter name="arbitrationPriority" value="1" />
|
||||
<parameter name="baseAddress" value="0x00030000" />
|
||||
<parameter name="defaultConnection" value="false" />
|
||||
</connection>
|
||||
<connection
|
||||
kind="avalon"
|
||||
version="15.0"
|
||||
start="a5soc_base.sys_cpu_interconnect_m0"
|
||||
end="fmcjesdadc1.axi_jesd_xcvr_s_axi">
|
||||
<parameter name="arbitrationPriority" value="1" />
|
||||
<parameter name="baseAddress" value="0x0000" />
|
||||
<parameter name="defaultConnection" value="false" />
|
||||
</connection>
|
||||
<connection
|
||||
kind="clock"
|
||||
version="15.0"
|
||||
start="a5soc_base.sys_clk"
|
||||
end="fmcjesdadc1.mem_clk" />
|
||||
<connection
|
||||
kind="clock"
|
||||
version="15.0"
|
||||
start="a5soc_base.sys_clk"
|
||||
end="fmcjesdadc1.sys_clk" />
|
||||
<connection
|
||||
kind="interrupt"
|
||||
version="15.0"
|
||||
start="a5soc_base.sys_intr"
|
||||
end="fmcjesdadc1.axi_dmac_0_intr">
|
||||
<parameter name="irqNumber" value="0" />
|
||||
</connection>
|
||||
<connection
|
||||
kind="interrupt"
|
||||
version="15.0"
|
||||
start="a5soc_base.sys_intr"
|
||||
end="fmcjesdadc1.axi_dmac_1_intr">
|
||||
<parameter name="irqNumber" value="1" />
|
||||
</connection>
|
||||
<connection
|
||||
kind="reset"
|
||||
version="15.0"
|
||||
start="a5soc_base.sys_rst"
|
||||
end="fmcjesdadc1.mem_rst" />
|
||||
<connection
|
||||
kind="reset"
|
||||
version="15.0"
|
||||
start="a5soc_base.sys_rst"
|
||||
end="fmcjesdadc1.sys_rst" />
|
||||
<interconnectRequirement for="$system" name="qsys_mm.clockCrossingAdapter" value="FIFO" />
|
||||
<interconnectRequirement for="$system" name="qsys_mm.insertDefaultSlave" value="FALSE" />
|
||||
<interconnectRequirement for="$system" name="qsys_mm.maxAdditionalLatency" value="2" />
|
||||
</system>
|
||||
|
|
@ -5,12 +5,10 @@ source ../../scripts/adi_env.tcl
|
|||
project_new fmcjesdadc1_a5soc -overwrite
|
||||
|
||||
source "../../common/a5soc/a5soc_system_assign.tcl"
|
||||
set_global_assignment -name IP_SEARCH_PATHS "../common/;../../common/a5soc;../../../library/**/*"
|
||||
set_user_option -name USER_IP_SEARCH_PATHS "../common/;../../common/a5soc/;../../../library/**/*"
|
||||
set_global_assignment -name QSYS_FILE system_bd.qsys
|
||||
|
||||
set_global_assignment -name VERILOG_FILE ../common/fmcjesdadc1_spi.v
|
||||
set_global_assignment -name VERILOG_FILE system_top.v
|
||||
set_global_assignment -name QSYS_FILE system_bd.qsys
|
||||
|
||||
set_global_assignment -name SDC_FILE system_constr.sdc
|
||||
set_global_assignment -name TOP_LEVEL_ENTITY system_top
|
||||
|
|
|
|||
|
|
@ -0,0 +1,6 @@
|
|||
|
||||
source $ad_hdl_dir/projects/common/a5soc/a5soc_system_qsys.tcl
|
||||
source ../common/fmcjesdadc1_qsys.tcl
|
||||
|
||||
save_system "system_bd.qsys"
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
|
|
@ -0,0 +1,138 @@
|
|||
|
||||
# ad9250-xcvr
|
||||
|
||||
add_instance avl_ad9250_xcvr avl_adxcvr 1.0
|
||||
set_instance_parameter_value avl_ad9250_xcvr {ID} {1}
|
||||
set_instance_parameter_value avl_ad9250_xcvr {TX_OR_RX_N} {0}
|
||||
set_instance_parameter_value avl_ad9250_xcvr {PCS_CONFIG} {JESD_PCS_CFG1}
|
||||
set_instance_parameter_value avl_ad9250_xcvr {LANE_RATE} {5000.0}
|
||||
set_instance_parameter_value avl_ad9250_xcvr {PLLCLK_FREQUENCY} {2500.0}
|
||||
set_instance_parameter_value avl_ad9250_xcvr {REFCLK_FREQUENCY} {250.0}
|
||||
set_instance_parameter_value avl_ad9250_xcvr {CORECLK_FREQUENCY} {125.0}
|
||||
set_instance_parameter_value avl_ad9250_xcvr {NUM_OF_LANES} {4}
|
||||
set_instance_parameter_value avl_ad9250_xcvr {NUM_OF_CONVS} {4}
|
||||
set_instance_parameter_value avl_ad9250_xcvr {FRM_BCNT} {4}
|
||||
set_instance_parameter_value avl_ad9250_xcvr {FRM_SCNT} {1}
|
||||
set_instance_parameter_value avl_ad9250_xcvr {MF_FCNT} {32}
|
||||
set_instance_parameter_value avl_ad9250_xcvr {HD} {0}
|
||||
|
||||
add_connection sys_clk.clk avl_ad9250_xcvr.sys_clk
|
||||
add_connection sys_clk.clk_reset avl_ad9250_xcvr.sys_resetn
|
||||
add_interface rx_ref_clk clock sink
|
||||
set_interface_property rx_ref_clk EXPORT_OF avl_ad9250_xcvr.ref_clk
|
||||
add_interface rx_data_0 conduit end
|
||||
set_interface_property rx_data_0 EXPORT_OF avl_ad9250_xcvr.rx_data_0
|
||||
add_interface rx_data_1 conduit end
|
||||
set_interface_property rx_data_1 EXPORT_OF avl_ad9250_xcvr.rx_data_1
|
||||
add_interface rx_data_2 conduit end
|
||||
set_interface_property rx_data_2 EXPORT_OF avl_ad9250_xcvr.rx_data_2
|
||||
add_interface rx_data_3 conduit end
|
||||
set_interface_property rx_data_3 EXPORT_OF avl_ad9250_xcvr.rx_data_3
|
||||
add_interface rx_sysref conduit end
|
||||
set_interface_property rx_sysref EXPORT_OF avl_ad9250_xcvr.sysref
|
||||
add_interface rx_sync conduit end
|
||||
set_interface_property rx_sync EXPORT_OF avl_ad9250_xcvr.sync
|
||||
|
||||
# ad9250-xcvr
|
||||
|
||||
add_instance axi_ad9250_xcvr axi_adxcvr 1.0
|
||||
set_instance_parameter_value axi_ad9250_xcvr {ID} {1}
|
||||
set_instance_parameter_value axi_ad9250_xcvr {TX_OR_RX_N} {0}
|
||||
set_instance_parameter_value axi_ad9250_xcvr {NUM_OF_LANES} {4}
|
||||
|
||||
add_connection sys_clk.clk axi_ad9250_xcvr.s_axi_clock
|
||||
add_connection sys_clk.clk_reset axi_ad9250_xcvr.s_axi_reset
|
||||
add_connection axi_ad9250_xcvr.if_up_rst avl_ad9250_xcvr.rst
|
||||
add_connection avl_ad9250_xcvr.ready axi_ad9250_xcvr.ready
|
||||
add_connection axi_ad9250_xcvr.core_pll_locked avl_ad9250_xcvr.core_pll_locked
|
||||
|
||||
# ad9250
|
||||
|
||||
add_instance axi_ad9250_core_0 axi_ad9250 1.0
|
||||
|
||||
add_connection avl_ad9250_xcvr.core_clk axi_ad9250_core_0.if_rx_clk
|
||||
add_connection avl_ad9250_xcvr.ip_sof axi_ad9250_core_0.if_rx_sof
|
||||
add_connection avl_ad9250_xcvr.ip_data axi_ad9250_core_0.if_rx_data
|
||||
add_connection sys_clk.clk_reset axi_ad9250_core_0.s_axi_reset
|
||||
add_connection sys_clk.clk axi_ad9250_core_0.s_axi_clock
|
||||
|
||||
add_instance axi_ad9250_core_1 axi_ad9250 1.0
|
||||
|
||||
add_connection avl_ad9250_xcvr.core_clk axi_ad9250_core_1.if_rx_clk
|
||||
add_connection avl_ad9250_xcvr.ip_sof axi_ad9250_core_1.if_rx_sof
|
||||
add_connection avl_ad9250_xcvr.ip_data axi_ad9250_core_1.if_rx_data
|
||||
add_connection sys_clk.clk_reset axi_ad9250_core_1.s_axi_reset
|
||||
add_connection sys_clk.clk axi_ad9250_core_1.s_axi_clock
|
||||
|
||||
# ad9250-pack
|
||||
|
||||
add_instance util_ad9250_cpack util_cpack 1.0
|
||||
set_instance_parameter_value util_ad9250_cpack {CHANNEL_DATA_WIDTH} {32}
|
||||
set_instance_parameter_value util_ad9250_cpack {NUM_OF_CHANNELS} {4}
|
||||
|
||||
add_connection sys_clk.clk_reset util_ad9250_cpack.if_adc_rst
|
||||
add_connection sys_dma_clk.clk_reset util_ad9250_cpack.if_adc_rst
|
||||
add_connection avl_ad9250_xcvr.core_clk util_ad9250_cpack.if_adc_clk
|
||||
add_connection axi_ad9250_core_0.adc_ch_0 util_ad9250_cpack.adc_ch_0
|
||||
add_connection axi_ad9250_core_0.adc_ch_1 util_ad9250_cpack.adc_ch_1
|
||||
add_connection axi_ad9250_core_1.adc_ch_0 util_ad9250_cpack.adc_ch_2
|
||||
add_connection axi_ad9250_core_1.adc_ch_1 util_ad9250_cpack.adc_ch_3
|
||||
|
||||
# ad9250-fifo
|
||||
|
||||
add_instance ad9250_adcfifo util_adcfifo 1.0
|
||||
set_instance_parameter_value ad9250_adcfifo {ADC_DATA_WIDTH} {128}
|
||||
set_instance_parameter_value ad9250_adcfifo {DMA_DATA_WIDTH} {128}
|
||||
set_instance_parameter_value ad9250_adcfifo {DMA_ADDRESS_WIDTH} {16}
|
||||
|
||||
add_connection sys_clk.clk_reset ad9250_adcfifo.if_adc_rst
|
||||
add_connection sys_dma_clk.clk_reset ad9250_adcfifo.if_adc_rst
|
||||
add_connection avl_ad9250_xcvr.core_clk ad9250_adcfifo.if_adc_clk
|
||||
add_connection util_ad9250_cpack.if_adc_valid ad9250_adcfifo.if_adc_wr
|
||||
add_connection util_ad9250_cpack.if_adc_data ad9250_adcfifo.if_adc_wdata
|
||||
add_connection sys_dma_clk.clk ad9250_adcfifo.if_dma_clk
|
||||
|
||||
# ad9250-dma
|
||||
|
||||
add_instance axi_ad9250_dma axi_dmac 1.0
|
||||
set_instance_parameter_value axi_ad9250_dma {DMA_DATA_WIDTH_SRC} {128}
|
||||
set_instance_parameter_value axi_ad9250_dma {DMA_DATA_WIDTH_DEST} {128}
|
||||
set_instance_parameter_value axi_ad9250_dma {DMA_LENGTH_WIDTH} {24}
|
||||
set_instance_parameter_value axi_ad9250_dma {DMA_2D_TRANSFER} {0}
|
||||
set_instance_parameter_value axi_ad9250_dma {SYNC_TRANSFER_START} {1}
|
||||
set_instance_parameter_value axi_ad9250_dma {CYCLIC} {0}
|
||||
set_instance_parameter_value axi_ad9250_dma {DMA_TYPE_DEST} {0}
|
||||
set_instance_parameter_value axi_ad9250_dma {DMA_TYPE_SRC} {1}
|
||||
|
||||
add_connection sys_dma_clk.clk axi_ad9250_dma.if_s_axis_aclk
|
||||
add_connection ad9250_adcfifo.if_dma_wr axi_ad9250_dma.if_s_axis_valid
|
||||
add_connection ad9250_adcfifo.if_dma_wdata axi_ad9250_dma.if_s_axis_data
|
||||
add_connection ad9250_adcfifo.if_dma_wready axi_ad9250_dma.if_s_axis_ready
|
||||
add_connection ad9250_adcfifo.if_dma_xfer_req axi_ad9250_dma.if_s_axis_xfer_req
|
||||
add_connection ad9250_adcfifo.if_adc_wovf axi_ad9250_core_0.if_adc_dovf
|
||||
add_connection sys_clk.clk_reset axi_ad9250_dma.s_axi_reset
|
||||
add_connection sys_clk.clk axi_ad9250_dma.s_axi_clock
|
||||
add_connection sys_dma_clk.clk_reset axi_ad9250_dma.m_dest_axi_reset
|
||||
add_connection sys_dma_clk.clk axi_ad9250_dma.m_dest_axi_clock
|
||||
|
||||
# addresses
|
||||
|
||||
ad_cpu_interconnect 0x00010000 avl_ad9250_xcvr.phy_reconfig_0
|
||||
ad_cpu_interconnect 0x00011000 avl_ad9250_xcvr.phy_reconfig_1
|
||||
ad_cpu_interconnect 0x00012000 avl_ad9250_xcvr.phy_reconfig_2
|
||||
ad_cpu_interconnect 0x00013000 avl_ad9250_xcvr.phy_reconfig_3
|
||||
ad_cpu_interconnect 0x00018000 avl_ad9250_xcvr.core_pll_reconfig
|
||||
ad_cpu_interconnect 0x00019000 avl_ad9250_xcvr.ip_reconfig
|
||||
ad_cpu_interconnect 0x00020000 axi_ad9250_xcvr.s_axi
|
||||
ad_cpu_interconnect 0x00050000 axi_ad9250_core_0.s_axi
|
||||
ad_cpu_interconnect 0x00060000 axi_ad9250_core_1.s_axi
|
||||
ad_cpu_interconnect 0x00070000 axi_ad9250_dma.s_axi
|
||||
|
||||
# dma interconnects
|
||||
|
||||
ad_dma_interconnect axi_ad9250_dma.m_dest_axi
|
||||
|
||||
# interrupts
|
||||
|
||||
ad_cpu_interrupt 11 axi_ad9250_dma.interrupt_sender
|
||||
|
||||
Loading…
Reference in New Issue