diff --git a/library/axi_ad6676/axi_ad6676.v b/library/axi_ad6676/axi_ad6676.v index 7131e97fa..de5b289da 100755 --- a/library/axi_ad6676/axi_ad6676.v +++ b/library/axi_ad6676/axi_ad6676.v @@ -278,7 +278,7 @@ module axi_ad6676 ( .up_drp_wr (), .up_drp_addr (), .up_drp_wdata (), - .up_drp_rdata (16'd0), + .up_drp_rdata (32'd0), .up_drp_ready (1'd0), .up_drp_locked (1'd1), .up_usr_chanmax (), diff --git a/library/axi_ad9144/axi_ad9144_core.v b/library/axi_ad9144/axi_ad9144_core.v index 9535c2764..145ba8b1e 100644 --- a/library/axi_ad9144/axi_ad9144_core.v +++ b/library/axi_ad9144/axi_ad9144_core.v @@ -300,7 +300,7 @@ module axi_ad9144_core ( .up_drp_wr (), .up_drp_addr (), .up_drp_wdata (), - .up_drp_rdata (16'd0), + .up_drp_rdata (32'd0), .up_drp_ready (1'd0), .up_drp_locked (1'd1), .up_usr_chanmax (), diff --git a/library/axi_ad9152/axi_ad9152_core.v b/library/axi_ad9152/axi_ad9152_core.v index 93cb929ea..f98d8b26b 100644 --- a/library/axi_ad9152/axi_ad9152_core.v +++ b/library/axi_ad9152/axi_ad9152_core.v @@ -224,7 +224,7 @@ module axi_ad9152_core ( .up_drp_wr (), .up_drp_addr (), .up_drp_wdata (), - .up_drp_rdata (16'd0), + .up_drp_rdata (32'd0), .up_drp_ready (1'd0), .up_drp_locked (1'd1), .up_usr_chanmax (), diff --git a/library/axi_ad9162/axi_ad9162_core.v b/library/axi_ad9162/axi_ad9162_core.v index eea944f67..7bfbbdcd7 100644 --- a/library/axi_ad9162/axi_ad9162_core.v +++ b/library/axi_ad9162/axi_ad9162_core.v @@ -179,7 +179,7 @@ module axi_ad9162_core ( .up_drp_wr (), .up_drp_addr (), .up_drp_wdata (), - .up_drp_rdata (16'd0), + .up_drp_rdata (32'd0), .up_drp_ready (1'd0), .up_drp_locked (1'd1), .up_usr_chanmax (), diff --git a/library/axi_ad9234/axi_ad9234.v b/library/axi_ad9234/axi_ad9234.v index 53680519b..d26b48102 100644 --- a/library/axi_ad9234/axi_ad9234.v +++ b/library/axi_ad9234/axi_ad9234.v @@ -276,7 +276,7 @@ module axi_ad9234 ( .up_drp_wr (), .up_drp_addr (), .up_drp_wdata (), - .up_drp_rdata (16'd0), + .up_drp_rdata (32'd0), .up_drp_ready (1'd0), .up_drp_locked (1'd1), .up_usr_chanmax (), diff --git a/library/axi_ad9250/axi_ad9250.v b/library/axi_ad9250/axi_ad9250.v index 679c22af1..cd63f98b6 100644 --- a/library/axi_ad9250/axi_ad9250.v +++ b/library/axi_ad9250/axi_ad9250.v @@ -277,7 +277,7 @@ module axi_ad9250 ( .up_drp_wr (), .up_drp_addr (), .up_drp_wdata (), - .up_drp_rdata (16'd0), + .up_drp_rdata (32'd0), .up_drp_ready (1'd0), .up_drp_locked (1'd1), .up_usr_chanmax (), diff --git a/library/axi_ad9265/axi_ad9265.v b/library/axi_ad9265/axi_ad9265.v index 1afb8111a..0ed145d04 100644 --- a/library/axi_ad9265/axi_ad9265.v +++ b/library/axi_ad9265/axi_ad9265.v @@ -299,7 +299,7 @@ module axi_ad9265 ( .up_drp_wr (), .up_drp_addr (), .up_drp_wdata (), - .up_drp_rdata (16'd0), + .up_drp_rdata (32'd0), .up_drp_ready (1'd0), .up_drp_locked (1'd1), .up_usr_chanmax (), diff --git a/library/axi_ad9361/axi_ad9361_rx.v b/library/axi_ad9361/axi_ad9361_rx.v index db4044d1a..4c4a60ab7 100644 --- a/library/axi_ad9361/axi_ad9361_rx.v +++ b/library/axi_ad9361/axi_ad9361_rx.v @@ -370,7 +370,7 @@ module axi_ad9361_rx ( .up_drp_wr (), .up_drp_addr (), .up_drp_wdata (), - .up_drp_rdata (16'd0), + .up_drp_rdata (32'd0), .up_drp_ready (1'd0), .up_drp_locked (1'd1), .up_usr_chanmax (), diff --git a/library/axi_ad9361/axi_ad9361_tx.v b/library/axi_ad9361/axi_ad9361_tx.v index 42ac81421..a6312493f 100644 --- a/library/axi_ad9361/axi_ad9361_tx.v +++ b/library/axi_ad9361/axi_ad9361_tx.v @@ -377,7 +377,7 @@ module axi_ad9361_tx ( .up_drp_wr (), .up_drp_addr (), .up_drp_wdata (), - .up_drp_rdata (16'd0), + .up_drp_rdata (32'd0), .up_drp_ready (1'd0), .up_drp_locked (1'd1), .up_usr_chanmax (), diff --git a/library/axi_ad9371/axi_ad9371_rx.v b/library/axi_ad9371/axi_ad9371_rx.v index 55c7ce5c9..a0f5e6b12 100644 --- a/library/axi_ad9371/axi_ad9371_rx.v +++ b/library/axi_ad9371/axi_ad9371_rx.v @@ -319,7 +319,7 @@ module axi_ad9371_rx ( .up_drp_wr (), .up_drp_addr (), .up_drp_wdata (), - .up_drp_rdata (16'd0), + .up_drp_rdata (32'd0), .up_drp_ready (1'd0), .up_drp_locked (1'd1), .up_usr_chanmax (), diff --git a/library/axi_ad9371/axi_ad9371_rx_os.v b/library/axi_ad9371/axi_ad9371_rx_os.v index ec839738f..8bbb1afc9 100644 --- a/library/axi_ad9371/axi_ad9371_rx_os.v +++ b/library/axi_ad9371/axi_ad9371_rx_os.v @@ -236,7 +236,7 @@ module axi_ad9371_rx_os ( .up_drp_wr (), .up_drp_addr (), .up_drp_wdata (), - .up_drp_rdata (16'd0), + .up_drp_rdata (32'd0), .up_drp_ready (1'd0), .up_drp_locked (1'd1), .up_usr_chanmax (), diff --git a/library/axi_ad9371/axi_ad9371_tx.v b/library/axi_ad9371/axi_ad9371_tx.v index 4bd197b48..b53f625f0 100644 --- a/library/axi_ad9371/axi_ad9371_tx.v +++ b/library/axi_ad9371/axi_ad9371_tx.v @@ -305,7 +305,7 @@ module axi_ad9371_tx ( .up_drp_wr (), .up_drp_addr (), .up_drp_wdata (), - .up_drp_rdata (16'd0), + .up_drp_rdata (32'd0), .up_drp_ready (1'd0), .up_drp_locked (1'd1), .up_usr_chanmax (), diff --git a/library/axi_ad9625/axi_ad9625.v b/library/axi_ad9625/axi_ad9625.v index 8fd860fc3..bd23692d6 100644 --- a/library/axi_ad9625/axi_ad9625.v +++ b/library/axi_ad9625/axi_ad9625.v @@ -242,7 +242,7 @@ module axi_ad9625 ( .up_drp_wr (), .up_drp_addr (), .up_drp_wdata (), - .up_drp_rdata (16'd0), + .up_drp_rdata (32'd0), .up_drp_ready (1'd0), .up_drp_locked (1'd1), .up_usr_chanmax (), diff --git a/library/axi_ad9643/axi_ad9643.v b/library/axi_ad9643/axi_ad9643.v index 312036814..4fbb67a54 100644 --- a/library/axi_ad9643/axi_ad9643.v +++ b/library/axi_ad9643/axi_ad9643.v @@ -335,7 +335,7 @@ module axi_ad9643 ( .up_drp_wr (), .up_drp_addr (), .up_drp_wdata (), - .up_drp_rdata (16'd0), + .up_drp_rdata (32'd0), .up_drp_ready (1'd0), .up_drp_locked (1'd1), .up_usr_chanmax (), diff --git a/library/axi_ad9652/axi_ad9652.v b/library/axi_ad9652/axi_ad9652.v index f706e1494..4b51be6ea 100644 --- a/library/axi_ad9652/axi_ad9652.v +++ b/library/axi_ad9652/axi_ad9652.v @@ -333,7 +333,7 @@ module axi_ad9652 ( .up_drp_wr (), .up_drp_addr (), .up_drp_wdata (), - .up_drp_rdata (16'd0), + .up_drp_rdata (32'd0), .up_drp_ready (1'd0), .up_drp_locked (1'd1), .up_usr_chanmax (), diff --git a/library/axi_ad9671/axi_ad9671.v b/library/axi_ad9671/axi_ad9671.v index 46406cfab..1b524ca70 100644 --- a/library/axi_ad9671/axi_ad9671.v +++ b/library/axi_ad9671/axi_ad9671.v @@ -290,7 +290,7 @@ module axi_ad9671 ( .up_drp_wr (), .up_drp_addr (), .up_drp_wdata (), - .up_drp_rdata (16'd0), + .up_drp_rdata (32'd0), .up_drp_ready (1'd0), .up_drp_locked (1'd1), .up_usr_chanmax (), diff --git a/library/axi_ad9680/axi_ad9680.v b/library/axi_ad9680/axi_ad9680.v index a7b50c7c5..0f404143c 100644 --- a/library/axi_ad9680/axi_ad9680.v +++ b/library/axi_ad9680/axi_ad9680.v @@ -281,7 +281,7 @@ module axi_ad9680 ( .up_drp_wr (), .up_drp_addr (), .up_drp_wdata (), - .up_drp_rdata (16'd0), + .up_drp_rdata (32'd0), .up_drp_ready (1'd0), .up_drp_locked (1'd1), .up_usr_chanmax (), diff --git a/library/axi_ad9739a/axi_ad9739a_core.v b/library/axi_ad9739a/axi_ad9739a_core.v index 12a2a34bc..0f8387866 100644 --- a/library/axi_ad9739a/axi_ad9739a_core.v +++ b/library/axi_ad9739a/axi_ad9739a_core.v @@ -227,7 +227,7 @@ module axi_ad9739a_core ( .up_drp_wr (), .up_drp_addr (), .up_drp_wdata (), - .up_drp_rdata (16'd0), + .up_drp_rdata (32'd0), .up_drp_ready (1'd1), .up_drp_locked (1'd1), .up_usr_chanmax (), diff --git a/library/axi_generic_adc/axi_generic_adc.v b/library/axi_generic_adc/axi_generic_adc.v index c466ec2eb..b7c899abe 100644 --- a/library/axi_generic_adc/axi_generic_adc.v +++ b/library/axi_generic_adc/axi_generic_adc.v @@ -101,7 +101,7 @@ up_adc_common #(.ID(ID)) i_up_adc_common ( .up_drp_wr (), .up_drp_addr (), .up_drp_wdata (), - .up_drp_rdata (16'd0), + .up_drp_rdata (32'd0), .up_drp_ready (1'd0), .up_drp_locked (1'd1), .up_usr_chanmax (), diff --git a/library/common/up_adc_common.v b/library/common/up_adc_common.v index 2a9738b8d..bc6c7dda3 100644 --- a/library/common/up_adc_common.v +++ b/library/common/up_adc_common.v @@ -1,9 +1,9 @@ // *************************************************************************** // *************************************************************************** // Copyright 2011(c) Analog Devices, Inc. -// +// // All rights reserved. -// +// // Redistribution and use in source and binary forms, with or without modification, // are permitted provided that the following conditions are met: // - Redistributions of source code must retain the above copyright @@ -21,16 +21,16 @@ // patent holders to use this software. // - Use of the software either in source or binary form, must be run // on or directly connected to an Analog Devices Inc. component. -// +// // THIS SOFTWARE IS PROVIDED BY ANALOG DEVICES "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, // INCLUDING, BUT NOT LIMITED TO, NON-INFRINGEMENT, MERCHANTABILITY AND FITNESS FOR A // PARTICULAR PURPOSE ARE DISCLAIMED. // // IN NO EVENT SHALL ANALOG DEVICES BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, // EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, INTELLECTUAL PROPERTY -// RIGHTS, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR +// RIGHTS, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR // BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, -// STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF +// STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF // THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. // *************************************************************************** // *************************************************************************** @@ -130,8 +130,8 @@ module up_adc_common ( output up_drp_sel; output up_drp_wr; output [11:0] up_drp_addr; - output [15:0] up_drp_wdata; - input [15:0] up_drp_rdata; + output [31:0] up_drp_wdata; + input [31:0] up_drp_rdata; input up_drp_ready; input up_drp_locked; @@ -156,7 +156,7 @@ module up_adc_common ( output up_rack; // internal registers - + reg up_core_preset = 'd0; reg up_mmcm_preset = 'd0; reg up_wack = 'd0; @@ -171,8 +171,8 @@ module up_adc_common ( reg up_drp_status = 'd0; reg up_drp_rwn = 'd0; reg [11:0] up_drp_addr = 'd0; - reg [15:0] up_drp_wdata = 'd0; - reg [15:0] up_drp_rdata_hold = 'd0; + reg [31:0] up_drp_wdata = 'd0; + reg [31:0] up_drp_rdata_hold = 'd0; reg up_status_ovf = 'd0; reg up_status_unf = 'd0; reg [ 7:0] up_usr_chanmax = 'd0; @@ -259,9 +259,11 @@ module up_adc_common ( up_drp_status <= 1'b0; end if ((up_wreq_s == 1'b1) && (up_waddr[7:0] == 8'h1c)) begin - up_drp_rwn <= up_wdata[28]; - up_drp_addr <= up_wdata[27:16]; - up_drp_wdata <= up_wdata[15:0]; + up_drp_rwn <= up_wdata[12]; + up_drp_addr <= up_wdata[11:0]; + end + if ((up_wreq_s == 1'b1) && (up_waddr[7:0] == 8'h1e)) begin + up_drp_wdata <= up_wdata; end if (up_drp_ready == 1'b1) begin up_drp_rdata_hold <= up_drp_rdata; @@ -307,8 +309,10 @@ module up_adc_common ( 8'h16: up_rdata <= adc_clk_ratio; 8'h17: up_rdata <= {28'd0, up_status_pn_err, up_status_pn_oos, up_status_or, up_status_s}; 8'h1a: up_rdata <= {31'd0, up_sync_status_s}; - 8'h1c: up_rdata <= {3'd0, up_drp_rwn, up_drp_addr, up_drp_wdata}; - 8'h1d: up_rdata <= {14'd0, up_drp_locked, up_drp_status, up_drp_rdata_hold}; + 8'h1c: up_rdata <= {19'd0, up_drp_rwn, up_drp_addr}; + 8'h1d: up_rdata <= {30'd0, up_drp_locked, up_drp_status}; + 8'h1e: up_rdata <= up_drp_wdata; + 8'h1f: up_rdata <= up_drp_rdata_hold; 8'h22: up_rdata <= {29'd0, up_status_ovf, up_status_unf, 1'b0}; 8'h23: up_rdata <= 32'd8; 8'h28: up_rdata <= {24'd0, adc_usr_chanmax}; diff --git a/library/common/up_dac_common.v b/library/common/up_dac_common.v index 82e5d1f45..02900c7b9 100644 --- a/library/common/up_dac_common.v +++ b/library/common/up_dac_common.v @@ -1,9 +1,9 @@ // *************************************************************************** // *************************************************************************** // Copyright 2011(c) Analog Devices, Inc. -// +// // All rights reserved. -// +// // Redistribution and use in source and binary forms, with or without modification, // are permitted provided that the following conditions are met: // - Redistributions of source code must retain the above copyright @@ -21,16 +21,16 @@ // patent holders to use this software. // - Use of the software either in source or binary form, must be run // on or directly connected to an Analog Devices Inc. component. -// +// // THIS SOFTWARE IS PROVIDED BY ANALOG DEVICES "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, // INCLUDING, BUT NOT LIMITED TO, NON-INFRINGEMENT, MERCHANTABILITY AND FITNESS FOR A // PARTICULAR PURPOSE ARE DISCLAIMED. // // IN NO EVENT SHALL ANALOG DEVICES BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, // EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, INTELLECTUAL PROPERTY -// RIGHTS, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR +// RIGHTS, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR // BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, -// STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF +// STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF // THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. // *************************************************************************** // *************************************************************************** @@ -122,8 +122,8 @@ module up_dac_common ( output up_drp_sel; output up_drp_wr; output [11:0] up_drp_addr; - output [15:0] up_drp_wdata; - input [15:0] up_drp_rdata; + output [31:0] up_drp_wdata; + input [31:0] up_drp_rdata; input up_drp_ready; input up_drp_locked; @@ -168,8 +168,8 @@ module up_dac_common ( reg up_drp_status = 'd0; reg up_drp_rwn = 'd0; reg [11:0] up_drp_addr = 'd0; - reg [15:0] up_drp_wdata = 'd0; - reg [15:0] up_drp_rdata_hold = 'd0; + reg [31:0] up_drp_wdata = 'd0; + reg [31:0] up_drp_rdata_hold = 'd0; reg up_status_ovf = 'd0; reg up_status_unf = 'd0; reg [ 7:0] up_usr_chanmax = 'd0; @@ -280,9 +280,11 @@ module up_dac_common ( up_drp_status <= 1'b0; end if ((up_wreq_s == 1'b1) && (up_waddr[7:0] == 8'h1c)) begin - up_drp_rwn <= up_wdata[28]; - up_drp_addr <= up_wdata[27:16]; - up_drp_wdata <= up_wdata[15:0]; + up_drp_rwn <= up_wdata[12]; + up_drp_addr <= up_wdata[11:0]; + end + if ((up_wreq_s == 1'b1) && (up_waddr[7:0] == 8'h1e)) begin + up_drp_wdata <= up_wdata; end if (up_drp_ready == 1'b1) begin up_drp_rdata_hold <= up_drp_rdata; @@ -329,8 +331,10 @@ module up_dac_common ( 8'h16: up_rdata <= dac_clk_ratio; 8'h17: up_rdata <= {31'd0, up_status_s}; 8'h18: up_rdata <= {31'd0, up_dac_clksel}; - 8'h1c: up_rdata <= {3'd0, up_drp_rwn, up_drp_addr, up_drp_wdata}; - 8'h1d: up_rdata <= {14'd0, up_drp_locked, up_drp_status, up_drp_rdata_hold}; + 8'h1c: up_rdata <= {19'd0, up_drp_rwn, up_drp_addr}; + 8'h1d: up_rdata <= {30'd0, up_drp_locked, up_drp_status}; + 8'h1e: up_rdata <= up_drp_wdata; + 8'h1f: up_rdata <= up_drp_rdata_hold; 8'h22: up_rdata <= {30'd0, up_status_ovf, up_status_unf}; 8'h28: up_rdata <= {24'd0, dac_usr_chanmax}; 8'h2e: up_rdata <= up_dac_gpio_in;