projects/scripts/project-intel.mk: change 'system_top.v' to '$(wildcard system_top*.v)' (#1169)

Change necessary to build intel projects with different system_top verilog files.
This was patterned to ae09b8a1bb/projects/scripts/project-xilinx.mk (L70)

Signed-off-by: Jem Geronimo <Johnerasmusmari.Geronimo@analog.com>
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Jem Geronimo 2023-09-07 15:52:04 +08:00 committed by GitHub
parent 8668c52fe7
commit 91ec36f417
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@ -94,7 +94,7 @@ endif
CLEAN_DIRS := $(dir $(wildcard */*_quartus.log))
M_DEPS += system_top.v
M_DEPS += $(wildcard system_top*.v)
M_DEPS += system_qsys.tcl
M_DEPS += system_project.tcl
M_DEPS += system_constr.sdc