pzsdr/ccfmc- add ad9517 signals
parent
b3cb84cf91
commit
92b7570864
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@ -66,6 +66,17 @@ set_property -dict {PACKAGE_PIN F5 IOSTANDARD LVCMOS18} [get_ports i2s_lrcl
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set_property -dict {PACKAGE_PIN E5 IOSTANDARD LVCMOS18} [get_ports i2s_sdata_out] ; ## IO_L7N_T1_34
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set_property -dict {PACKAGE_PIN D9 IOSTANDARD LVCMOS18} [get_ports i2s_sdata_in] ; ## IO_L8P_T1_34
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# ad9517
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set_property -dict {PACKAGE_PIN B4 IOSTANDARD LVCMOS18} [get_ports ad9517_csn] ; ## IO_L20N_T3_34
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set_property -dict {PACKAGE_PIN C4 IOSTANDARD LVCMOS18} [get_ports ad9517_clk] ; ## IO_L19P_T3_34
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set_property -dict {PACKAGE_PIN C3 IOSTANDARD LVCMOS18} [get_ports ad9517_mosi] ; ## IO_L19N_T3_VREF_34
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set_property -dict {PACKAGE_PIN B5 IOSTANDARD LVCMOS18} [get_ports ad9517_miso] ; ## IO_L20P_T3_34
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set_property -dict {PACKAGE_PIN B6 IOSTANDARD LVCMOS18} [get_ports ad9517_pdn] ; ## IO_L21P_T3_DQS_34
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set_property -dict {PACKAGE_PIN A5 IOSTANDARD LVCMOS18} [get_ports ad9517_ref_sel] ; ## IO_L21N_T3_DQS_34
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set_property -dict {PACKAGE_PIN A4 IOSTANDARD LVCMOS18} [get_ports ad9517_ld] ; ## IO_L22P_T3_34
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set_property -dict {PACKAGE_PIN A3 IOSTANDARD LVCMOS18} [get_ports ad9517_status] ; ## IO_L22N_T3_34
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# clocks
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create_clock -period 8.000 -name eth1_rgmii_rxclk [get_ports eth1_rgmii_rxclk]
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@ -93,6 +93,15 @@ module system_top (
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gpio_bd,
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ad9517_csn,
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ad9517_clk,
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ad9517_mosi,
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ad9517_miso,
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ad9517_pdn,
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ad9517_ref_sel,
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ad9517_ld,
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ad9517_status,
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rx_clk_in_p,
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rx_clk_in_n,
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rx_frame_in_p,
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@ -183,6 +192,15 @@ module system_top (
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inout [11:0] gpio_bd;
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output ad9517_csn;
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output ad9517_clk;
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output ad9517_mosi;
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input ad9517_miso;
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inout ad9517_pdn;
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inout ad9517_ref_sel;
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inout ad9517_ld;
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inout ad9517_status;
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input rx_clk_in_p;
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input rx_clk_in_n;
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input rx_frame_in_p;
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@ -221,6 +239,10 @@ module system_top (
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// internal signals
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wire [ 1:0] spi_csn_s;
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wire spi_clk_s;
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wire spi_mosi_s;
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wire spi_miso_s;
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wire [63:0] gpio_i;
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wire [63:0] gpio_o;
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wire [63:0] gpio_t;
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@ -232,14 +254,25 @@ module system_top (
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// assignments
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assign hdmi_pd = 1'b0;
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assign spi_csn = spi_csn_s[0];
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assign spi_clk = spi_clk_s;
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assign spi_mosi = spi_mosi_s;
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assign ad9517_csn = spi_csn_s[1];
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assign ad9517_clk = spi_clk_s;
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assign ad9517_mosi = spi_mosi_s;
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assign spi_miso_s = (~spi_csn_s[0] & spi_miso) | (~spi_csn_s[1] & ad9517_miso);
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// instantiations
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ad_iobuf #(.DATA_WIDTH(21)) i_iobuf (
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.dio_t ({gpio_t[56:51], gpio_t[46:32]}),
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.dio_i ({gpio_o[56:51], gpio_o[46:32]}),
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.dio_o ({gpio_i[56:51], gpio_i[46:32]}),
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.dio_p ({ gpio_rf0, // 56:56
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ad_iobuf #(.DATA_WIDTH(25)) i_iobuf (
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.dio_t ({gpio_t[60:51], gpio_t[46:32]}),
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.dio_i ({gpio_o[60:51], gpio_o[46:32]}),
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.dio_o ({gpio_i[60:51], gpio_i[46:32]}),
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.dio_p ({ ad9517_pdn, // 60:60
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ad9517_ref_sel, // 59:59
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ad9517_ld, // 58:58
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ad9517_status, // 57:57
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gpio_rf0, // 56:56
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gpio_rf1, // 55:55
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gpio_rf2, // 54:54
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gpio_rf3, // 53:53
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@ -339,14 +372,14 @@ module system_top (
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.rx_frame_in_p (rx_frame_in_p),
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.spdif (spdif),
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.spi0_clk_i (1'b0),
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.spi0_clk_o (spi_clk),
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.spi0_csn_0_o (spi_csn),
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.spi0_csn_1_o (),
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.spi0_clk_o (spi_clk_s),
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.spi0_csn_0_o (spi_csn_s[0]),
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.spi0_csn_1_o (spi_csn_s[1]),
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.spi0_csn_2_o (),
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.spi0_csn_i (1'b1),
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.spi0_sdi_i (spi_miso),
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.spi0_sdi_i (spi_miso_s),
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.spi0_sdo_i (1'b0),
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.spi0_sdo_o (spi_mosi),
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.spi0_sdo_o (spi_mosi_s),
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.spi1_clk_i (1'b0),
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.spi1_clk_o (),
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.spi1_csn_0_o (),
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