diff --git a/projects/fmcadc2/vc707/system_constr.xdc b/projects/fmcadc2/vc707/system_constr.xdc index 03009a936..47c95609b 100644 --- a/projects/fmcadc2/vc707/system_constr.xdc +++ b/projects/fmcadc2/vc707/system_constr.xdc @@ -1,39 +1,39 @@ # ad9625 -set_property -dict {PACKAGE_PIN A10 } [get_ports rx_ref_clk_p] ; ## D04 FMC1_HPC_GBTCLK0_M2C_P -set_property -dict {PACKAGE_PIN A9 } [get_ports rx_ref_clk_n] ; ## D05 FMC1_HPC_GBTCLK0_M2C_N -set_property -dict {PACKAGE_PIN D8 } [get_ports rx_data_p[0]] ; ## C06 FMC1_HPC_DP0_M2C_P -set_property -dict {PACKAGE_PIN D7 } [get_ports rx_data_n[0]] ; ## C07 FMC1_HPC_DP0_M2C_N -set_property -dict {PACKAGE_PIN C6 } [get_ports rx_data_p[1]] ; ## A02 FMC1_HPC_DP1_M2C_P -set_property -dict {PACKAGE_PIN C5 } [get_ports rx_data_n[1]] ; ## A03 FMC1_HPC_DP1_M2C_N -set_property -dict {PACKAGE_PIN B8 } [get_ports rx_data_p[2]] ; ## A06 FMC1_HPC_DP2_M2C_P -set_property -dict {PACKAGE_PIN B7 } [get_ports rx_data_n[2]] ; ## A07 FMC1_HPC_DP2_M2C_N -set_property -dict {PACKAGE_PIN A6 } [get_ports rx_data_p[3]] ; ## A10 FMC1_HPC_DP3_M2C_P -set_property -dict {PACKAGE_PIN A5 } [get_ports rx_data_n[3]] ; ## A11 FMC1_HPC_DP3_M2C_N -set_property -dict {PACKAGE_PIN E6 } [get_ports rx_data_p[4]] ; ## B12 FMC1_HPC_DP7_M2C_P -set_property -dict {PACKAGE_PIN E5 } [get_ports rx_data_n[4]] ; ## B13 FMC1_HPC_DP7_M2C_N -set_property -dict {PACKAGE_PIN H8 } [get_ports rx_data_p[5]] ; ## A14 FMC1_HPC_DP4_M2C_P -set_property -dict {PACKAGE_PIN H7 } [get_ports rx_data_n[5]] ; ## A15 FMC1_HPC_DP4_M2C_N -set_property -dict {PACKAGE_PIN F8 } [get_ports rx_data_p[6]] ; ## B16 FMC1_HPC_DP6_M2C_P -set_property -dict {PACKAGE_PIN F7 } [get_ports rx_data_n[6]] ; ## B17 FMC1_HPC_DP6_M2C_N -set_property -dict {PACKAGE_PIN G6 } [get_ports rx_data_p[7]] ; ## A18 FMC1_HPC_DP5_M2C_P -set_property -dict {PACKAGE_PIN G5 } [get_ports rx_data_n[7]] ; ## A19 FMC1_HPC_DP5_M2C_N -set_property -dict {PACKAGE_PIN H40 IOSTANDARD LVDS} [get_ports rx_sync_p] ; ## H10 FMC1_HPC_LA04_P -set_property -dict {PACKAGE_PIN H41 IOSTANDARD LVDS} [get_ports rx_sync_n] ; ## H11 FMC1_HPC_LA04_N -set_property -dict {PACKAGE_PIN M41 IOSTANDARD LVDS DIFF_TERM TRUE} [get_ports rx_sysref_p] ; ## D11 FMC1_HPC_LA05_P -set_property -dict {PACKAGE_PIN L41 IOSTANDARD LVDS DIFF_TERM TRUE} [get_ports rx_sysref_n] ; ## D12 FMC1_HPC_LA05_N +set_property -dict {PACKAGE_PIN A10 } [get_ports rx_ref_clk_p] ; ## D04 FMC1_HPC_GBTCLK0_M2C_P +set_property -dict {PACKAGE_PIN A9 } [get_ports rx_ref_clk_n] ; ## D05 FMC1_HPC_GBTCLK0_M2C_N +set_property -dict {PACKAGE_PIN D8 } [get_ports rx_data_p[0]] ; ## C06 FMC1_HPC_DP0_M2C_P +set_property -dict {PACKAGE_PIN D7 } [get_ports rx_data_n[0]] ; ## C07 FMC1_HPC_DP0_M2C_N +set_property -dict {PACKAGE_PIN C6 } [get_ports rx_data_p[1]] ; ## A02 FMC1_HPC_DP1_M2C_P +set_property -dict {PACKAGE_PIN C5 } [get_ports rx_data_n[1]] ; ## A03 FMC1_HPC_DP1_M2C_N +set_property -dict {PACKAGE_PIN B8 } [get_ports rx_data_p[2]] ; ## A06 FMC1_HPC_DP2_M2C_P +set_property -dict {PACKAGE_PIN B7 } [get_ports rx_data_n[2]] ; ## A07 FMC1_HPC_DP2_M2C_N +set_property -dict {PACKAGE_PIN A6 } [get_ports rx_data_p[3]] ; ## A10 FMC1_HPC_DP3_M2C_P +set_property -dict {PACKAGE_PIN A5 } [get_ports rx_data_n[3]] ; ## A11 FMC1_HPC_DP3_M2C_N +set_property -dict {PACKAGE_PIN E6 } [get_ports rx_data_p[4]] ; ## B12 FMC1_HPC_DP7_M2C_P +set_property -dict {PACKAGE_PIN E5 } [get_ports rx_data_n[4]] ; ## B13 FMC1_HPC_DP7_M2C_N +set_property -dict {PACKAGE_PIN H8 } [get_ports rx_data_p[5]] ; ## A14 FMC1_HPC_DP4_M2C_P +set_property -dict {PACKAGE_PIN H7 } [get_ports rx_data_n[5]] ; ## A15 FMC1_HPC_DP4_M2C_N +set_property -dict {PACKAGE_PIN F8 } [get_ports rx_data_p[6]] ; ## B16 FMC1_HPC_DP6_M2C_P +set_property -dict {PACKAGE_PIN F7 } [get_ports rx_data_n[6]] ; ## B17 FMC1_HPC_DP6_M2C_N +set_property -dict {PACKAGE_PIN G6 } [get_ports rx_data_p[7]] ; ## A18 FMC1_HPC_DP5_M2C_P +set_property -dict {PACKAGE_PIN G5 } [get_ports rx_data_n[7]] ; ## A19 FMC1_HPC_DP5_M2C_N +set_property -dict {PACKAGE_PIN H40 IOSTANDARD LVDS} [get_ports rx_sync_p] ; ## H10 FMC1_HPC_LA04_P +set_property -dict {PACKAGE_PIN H41 IOSTANDARD LVDS} [get_ports rx_sync_n] ; ## H11 FMC1_HPC_LA04_N +set_property -dict {PACKAGE_PIN M41 IOSTANDARD LVDS DIFF_TERM TRUE} [get_ports rx_sysref_p] ; ## D11 FMC1_HPC_LA05_P +set_property -dict {PACKAGE_PIN L41 IOSTANDARD LVDS DIFF_TERM TRUE} [get_ports rx_sysref_n] ; ## D12 FMC1_HPC_LA05_N -set_property -dict {PACKAGE_PIN N41 IOSTANDARD LVCMOS18} [get_ports spi_adc_csn] ; ## H08 FMC1_HPC_LA02_N -set_property -dict {PACKAGE_PIN J40 IOSTANDARD LVCMOS18} [get_ports spi_adc_clk] ; ## D08 FMC1_HPC_LA01_CC_P -set_property -dict {PACKAGE_PIN J41 IOSTANDARD LVCMOS18} [get_ports spi_adc_sdio] ; ## D09 FMC1_HPC_LA01_CC_N -set_property -dict {PACKAGE_PIN P41 IOSTANDARD LVCMOS18} [get_ports spi_ext_csn_0] ; ## H07 FMC1_HPC_LA02_P -set_property -dict {PACKAGE_PIN K42 IOSTANDARD LVCMOS18} [get_ports spi_ext_csn_1] ; ## C10 FMC1_HPC_LA06_P -set_property -dict {PACKAGE_PIN K39 IOSTANDARD LVCMOS18} [get_ports spi_ext_clk] ; ## G06 FMC1_HPC_LA00_CC_P -set_property -dict {PACKAGE_PIN K40 IOSTANDARD LVCMOS18} [get_ports spi_ext_sdio] ; ## G07 FMC1_HPC_LA00_CC_N +set_property -dict {PACKAGE_PIN N41 IOSTANDARD LVCMOS18} [get_ports spi_adc_csn] ; ## H08 FMC1_HPC_LA02_N +set_property -dict {PACKAGE_PIN J40 IOSTANDARD LVCMOS18} [get_ports spi_adc_clk] ; ## D08 FMC1_HPC_LA01_CC_P +set_property -dict {PACKAGE_PIN J41 IOSTANDARD LVCMOS18} [get_ports spi_adc_sdio] ; ## D09 FMC1_HPC_LA01_CC_N +set_property -dict {PACKAGE_PIN P41 IOSTANDARD LVCMOS18} [get_ports spi_adf4355_data_or_csn_0] ; ## H07 FMC1_HPC_LA02_P +set_property -dict {PACKAGE_PIN K42 IOSTANDARD LVCMOS18} [get_ports spi_adf4355_clk_or_csn_1] ; ## C10 FMC1_HPC_LA06_P +set_property -dict {PACKAGE_PIN K39 IOSTANDARD LVCMOS18} [get_ports spi_adf4355_le_or_clk] ; ## G06 FMC1_HPC_LA00_CC_P +set_property -dict {PACKAGE_PIN K40 IOSTANDARD LVCMOS18} [get_ports spi_adf4355_ce_or_sdio] ; ## G07 FMC1_HPC_LA00_CC_N -set_property -dict {PACKAGE_PIN M42 IOSTANDARD LVCMOS18} [get_ports adc_irq] ; ## G09 FMC1_HPC_LA03_P -set_property -dict {PACKAGE_PIN L42 IOSTANDARD LVCMOS18} [get_ports adc_fd] ; ## G10 FMC1_HPC_LA03_N +set_property -dict {PACKAGE_PIN M42 IOSTANDARD LVCMOS18} [get_ports adc_irq] ; ## G09 FMC1_HPC_LA03_P +set_property -dict {PACKAGE_PIN L42 IOSTANDARD LVCMOS18} [get_ports adc_fd] ; ## G10 FMC1_HPC_LA03_N # clocks diff --git a/projects/fmcadc2/vc707/system_top.v b/projects/fmcadc2/vc707/system_top.v index 1ce119e2a..b87f6073e 100644 --- a/projects/fmcadc2/vc707/system_top.v +++ b/projects/fmcadc2/vc707/system_top.v @@ -104,10 +104,11 @@ module system_top ( spi_adc_csn, spi_adc_clk, spi_adc_sdio, - spi_ext_csn_0, - spi_ext_csn_1, - spi_ext_clk, - spi_ext_sdio); + + spi_adf4355_data_or_csn_0, + spi_adf4355_clk_or_csn_1, + spi_adf4355_le_or_clk, + spi_adf4355_ce_or_sdio); input sys_rst; input sys_clk_p; @@ -174,10 +175,11 @@ module system_top ( output spi_adc_csn; output spi_adc_clk; inout spi_adc_sdio; - output spi_ext_csn_0; - output spi_ext_csn_1; - output spi_ext_clk; - inout spi_ext_sdio; + + output spi_adf4355_data_or_csn_0; + output spi_adf4355_clk_or_csn_1; + output spi_adf4355_le_or_clk; + inout spi_adf4355_ce_or_sdio; // internal signals @@ -191,14 +193,6 @@ module system_top ( wire rx_sysref; wire rx_sync; - // spi - - assign spi_adc_csn = spi_csn[0]; - assign spi_adc_clk = spi_clk; - assign spi_ext_csn_0 = spi_csn[1]; - assign spi_ext_csn_1 = spi_csn[2]; - assign spi_ext_clk = spi_clk; - // default logic assign fan_pwm = 1'b1; @@ -223,22 +217,30 @@ module system_top ( .O (rx_sync_p), .OB (rx_sync_n)); + // spi + + assign gpio_i[37:36] = gpio_o[37:36]; + fmcadc2_spi i_fmcadc2_spi ( - .spi_adc_csn (spi_adc_csn), - .spi_ext_csn_0 (spi_ext_csn_0), - .spi_ext_csn_1 (spi_ext_csn_1), + .spi_adf4355 (gpio_o[36]), + .spi_adf4355_ce (gpio_o[37]), .spi_clk (spi_clk), + .spi_csn (spi_csn), .spi_mosi (spi_mosi), .spi_miso (spi_miso), + .spi_adc_csn (spi_adc_csn), + .spi_adc_clk (spi_adc_clk), .spi_adc_sdio (spi_adc_sdio), - .spi_ext_sdio (spi_ext_sdio)); + .spi_adf4355_data_or_csn_0 (spi_adf4355_data_or_csn_0), + .spi_adf4355_clk_or_csn_1 (spi_adf4355_clk_or_csn_1), + .spi_adf4355_le_or_clk (spi_adf4355_le_or_clk), + .spi_adf4355_ce_or_sdio (spi_adf4355_ce_or_sdio)); ad_iobuf #(.DATA_WIDTH(2)) i_iobuf ( .dio_t (gpio_t[33:32]), .dio_i (gpio_o[33:32]), .dio_o (gpio_i[33:32]), - .dio_p ({ adc_irq, // 33 - adc_fd})); // 32 + .dio_p ({adc_irq, adc_fd})); ad_iobuf #(.DATA_WIDTH(21)) i_iobuf_bd ( .dio_t (gpio_t[20:0]),